Inventor
NAGARAJAN CHANDRASEKHAR
US3 patents
Patents
3 patentsUS11507504B2Nov 22, 2022
Memory sub-system for decoding non-power-of-two addressable unit address boundaries
MICRON TECHNOLOGY INC1 citations70
US11016885B2May 25, 2021
Memory sub-system for decoding non-power-of-two addressable unit address boundaries
MICRON TECHNOLOGY INC2 citations70
US11928055B2Mar 12, 2024
Memory sub-system for decoding non-power-of-two addressable unit address boundaries
MICRON TECHNOLOGY INC0 citations60