Inventor

TSAI CHENG-YUAN

TW253 patents

⚠️ This page may combine multiple inventors who share the name “TSAI CHENG-YUAN”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

TSAI CHENG-YUAN

TAIWAN SEMICONDUCTOR MFG CO LTD

Switching layer scheme to enhance RRAM performance

Techniques for MRAM MTJ top electrode connection

Structure and method to expose memory cells with different sizes

Deep trench isolation structures and methods of forming same

Oxide film scheme for RRAM structure

Bond chuck, methods of bonding, and tool including bond chuck

Sidewall passivation for HEMT devices

Buffer layer(s) on a stacked structure having a via

Multi-wafer capping layer for metal arcing protection

Trim wall protection method for multi-wafer stacking

Bonding support structure (and related process) for wafer stacking

Semiconductor structure having integrated inductor therein

Techniques for wafer stack processing

Switching layer scheme to enhance RRAM performance

Semiconductor structure having integrated inductor therein

Switching layer scheme to enhance RRAM performance

Semiconductor structure having integrated inductor therein

Sidewall passivation for HEMT devices

Buffer layer(s) on a stacked structure having a via

Switching layer scheme to enhance RRAM performance

Image sensor scheme for optical and electrical improvement

High K scheme to improve retention performance of resistive random access memory (RRAM)

Semiconductor structure having integrated inductor therein

Image device having multi-layered refractive layer on back surface

Resistive RAM structure and method of fabrication thereof

Selective deposition and planarization for a CMOS image sensor

Semiconductor structure and method of forming the same

Semiconductor device and method of forming the same

MIM/RRAM structure with improved capacitance and reduced leakage current

Bottom electrode structure for improved electric field uniformity

Bond chuck, methods of bonding, and tool including bond chuck

Image sensor device and method

Surface treatment and passivation for high electron mobility transistors

Resistive random access memory (RRAM) structure

UNITED MICROELECTRONICS CORP

Method for improving surface wettability of low k material

Low-K dual damascene integration process

Method of manufacturing multilevel interconnects including performing a surface treatment to form a hydrophilic surface layer

Method for gap filling

Method of fabricating dual damascene

Method for forming an inter-metal dielectric layer

Forming copper interconnects in dielectric materials with low constant dielectrics

Bilayer silicon carbide based barrier

Method of fabricating shallow trench isolation (STI)

TAIWAN SEMICONDUCTOR MFG

STI film property using SOD post-treatment

Method of reducing delamination in the fabrication of small-pitch devices

Plasmonic nanostructures for organic image sensors

CHEN NENG-KUO

Hybrid STI gap-filling approach

TSAI CHENG-YUAN

Mesh container

TANG BANG-TAI

Hybrid film for protecting MTJ stacks of MRAM

TUNG NAN INST OF TECHNOLOGY

Resonant converter with synchronous rectification drive circuit