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Inventor
CHIU CHIEN-MING
TW
7 patents
⚠️ This page may combine multiple inventors who share the name “CHIU CHIEN-MING”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
CHANG HUNG-PIN
2 patents
US8466059B2
Jun 18, 2013
Multi-layer interconnect structure for stacked dies
CHANG HUNG-PIN
32 citations
92
US8841773B2
Sep 23, 2014
Multi-layer interconnect structure for stacked dies
CHANG HUNG-PIN
6 citations
83
TAIWAN SEMICONDUCTOR MFG CO LTD
2 patents
US9478480B2
Oct 25, 2016
Alignment mark and method of formation
TAIWAN SEMICONDUCTOR MFG CO LTD
3 citations
72
US10867963B2
Dec 15, 2020
Die stack structure and method of fabricating the same
TAIWAN SEMICONDUCTOR MFG CO LTD
1 citations
62
TSAI CHEN-YU
1 patent
US8896136B2
Nov 25, 2014
Alignment mark and method of formation
TSAI CHEN-YU
10 citations
82
MEDIATEK INC
1 patent
US10127883B2
Nov 13, 2018
Frame rate control method and image processing apparatus selectively limiting frame rate
MEDIATEK INC
2 citations
70
UNIV NAT CHENG KUNG
1 patent
US12147811B2
Nov 19, 2024
Warp scheduling method for adjusting number of schedulable warps based on load/store unit stall cycle proportion
UNIV NAT CHENG KUNG
0 citations
51