P

Inventor

WOO BEEN-JON

US14 patents
⚠️ This page may combine multiple inventors who share the name “WOO BEEN-JON”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

INTEL CORP

13 patents
US5075245ADec 24, 1991

Method for improving erase characteristics of buried bit line flash EPROM devices without using sacrificial oxide growth and removal steps

INTEL CORP81 citations96
US4728617AMar 1, 1988

Method of fabricating a MOSFET with graded source and drain regions

INTEL CORP121 citations94
US5470772ANov 28, 1995

Silicidation method for contactless EPROM related devices

INTEL CORP32 citations92
US5229631AJul 20, 1993

Erase performance improvement via dual floating gate processing

INTEL CORP50 citations92
US5147813ASep 15, 1992

Erase performance improvement via dual floating gate processing

INTEL CORP43 citations92
US5102814AApr 7, 1992

Method for improving device scalability of buried bit line flash EPROM devices having short reoxidation beaks and shallower junctions

INTEL CORP43 citations92
US5077230ADec 31, 1991

Method for improving erase characteristics of buried bit line flash EPROM devices by use of a thin nitride layer formed during field oxide growth

INTEL CORP25 citations92
US4833099AMay 23, 1989

Tungsten-silicide reoxidation process including annealing in pure nitrogen and subsequent oxidation in oxygen

INTEL CORP28 citations92
US4784965ANov 15, 1988

Source drain doping technique

INTEL CORP33 citations91
US4757026AJul 12, 1988

Source drain doping technique

INTEL CORP54 citations91
US4774201ASep 27, 1988

Tungsten-silicide reoxidation technique using a CVD oxide cap

INTEL CORP21 citations81
US5196361AMar 23, 1993

Method of making source junction breakdown for devices with source-side erasing

INTEL CORP11 citations73
US7632736B2Dec 15, 2009

Self-aligned contact formation utilizing sacrificial polysilicon

INTEL CORP3 citations59

GRACE SEMICONDUCTOR MFG CORP

1 patent