Inventor
ANDREWS LAWRENCE P
US8 patents
Patents
8 patentsUS5634099AMay 27, 1997
Direct memory access unit for transferring data between processor memories in multiprocessing systems
IBM178 citations96
US6065131AMay 16, 2000
Multi-speed DSP kernel and clock mechanism
IBM147 citations94
US5553293ASep 3, 1996
Interprocessor interrupt processing system
IBM59 citations93
US6233643B1May 15, 2001
Apparatus including a host processor and communications adapters interconnected with a bus
IBM34 citations89
US5968158AOct 19, 1999
Apparatus including a host processor and communications adapters interconnected with a bus, with improved transfer of interrupts between the adapters and host processor
IBM40 citations89
US5602848AFeb 11, 1997
Multi-mode TDM interface circuit
IBM26 citations89
US5572695ANov 5, 1996
Transparent memory mapping mechanism for a digital signal processing system
IBM23 citations89
US4534011AAug 6, 1985
Peripheral attachment interface for I/O controller having cycle steal and off-line modes
IBM43 citations86