Inventor
HAZEN PETER K
US19 patents
Patents
19 patentsUS6223290B1Apr 24, 2001
Method and apparatus for preventing the fraudulent use of a cellular telephone
INTEL CORP166 citations98
US5937424AAug 10, 1999
Method and apparatus for suspending the writing of a nonvolatile semiconductor memory with program suspend command
INTEL CORP148 citations97
US6633950B1Oct 14, 2003
Nonvolatile writeable memory with preemption pin
INTEL CORP52 citations96
US6201739B1Mar 13, 2001
Nonvolatile writeable memory with preemption pin
INTEL CORP64 citations96
US6088264AJul 11, 2000
Flash memory partitioning for read-while-write operation
INTEL CORP77 citations95
US5280447AJan 18, 1994
Floating gate nonvolatile memory with configurable erasure blocks
INTEL CORP105 citations95
US6510083B1Jan 21, 2003
Electrically erasable and programmable memory that allows data update without prior erasure of the memory
INTEL CORP34 citations92
US6182189B1Jan 30, 2001
Method and apparatus for placing a memory in a read-while-write mode
INTEL CORP21 citations92
US5940861AAug 17, 1999
Method and apparatus for preempting operations in a nonvolatile memory in order to read code from the nonvolatile memory
INTEL CORP35 citations92
US5668760ASep 16, 1997
Nonvolatile memory with a write protection circuit
INTEL CORP47 citations92
US5594686AJan 14, 1997
Method and apparatus for protecting data stored in flash memory
INTEL CORP42 citations92
US5504875AApr 2, 1996
Nonvolatile memory with a programmable output of selectable width and a method for controlling the nonvolatile memory to switch between different output widths
INTEL CORP47 citations92
US5243575ASep 7, 1993
Address transition detection to write state machine interface circuit for flash memory
INTEL CORP31 citations92
US6148360ANov 14, 2000
Nonvolatile writeable memory with program suspend command
INTEL CORP36 citations91
US5267196ANov 30, 1993
Floating gate nonvolatile memory with distributed blocking feature
INTEL CORP37 citations91
US6150835ANov 21, 2000
Method and apparatus for fast production programming and low-voltage in-system writes for programmable logic device
INTEL CORP7 citations74
US5379413AJan 3, 1995
User selectable word/byte input architecture for flash EEPROM memory write and erase operations
INTEL CORP13 citations74
US5742935AApr 21, 1998
Method and apparatus for controlling the protection mode of flash memory
INTEL CORP14 citations73
US5572707ANov 5, 1996
Nonvolatile memory with a programmable configuration cell and a configuration logic for temporarily reconfiguring the memory without altering the programmed state of the configuration cell
INTEL CORP17 citations69