Inventor
BUFFET PATRICK H
US21 patents
Patents
21 patentsUS6499134B1Dec 24, 2002
Method of assigning integrated circuit I/O signals in an integrated circuit package
IBM81 citations96
US6631502B2Oct 7, 2003
Method of analyzing integrated circuit power distribution in chips containing voltage islands
IBM88 citations95
US6586828B2Jul 1, 2003
Integrated circuit bus grid having wires with pre-selected variable widths
IBM21 citations91
US6584596B2Jun 24, 2003
Method of designing a voltage partitioned solder-bump package
IBM35 citations91
US6538314B1Mar 25, 2003
Power grid wiring for semiconductor devices having voltage islands
IBM23 citations91
US6523150B1Feb 18, 2003
Method of designing a voltage partitioned wirebond package
IBM50 citations91
US6762367B2Jul 13, 2004
Electronic package having high density signal wires with low resistance
IBM13 citations84
US6978214B2Dec 20, 2005
Validation of electrical performance of an electronic package prior to fabrication
IBM12 citations82
US6606732B2Aug 12, 2003
Method for specifying, identifying, selecting or verifying differential signal pairs on IC packages
IBM14 citations81
US7017128B2Mar 21, 2006
Concurrent electrical signal wiring optimization for an electronic package
IBM8 citations73
US6703706B2Mar 9, 2004
Concurrent electrical signal wiring optimization for an electronic package
IBM8 citations73
US6495911B1Dec 17, 2002
Scalable high frequency integrated circuit package
IBM8 citations73
US6477057B1Nov 5, 2002
High frequency de-coupling via short circuits
IBM12 citations73
US7064570B2Jun 20, 2006
Method for locating IDDQ defects using multiple controlled collapse chip connections current measurement on an automatic tester
IBM5 citations72
US6924661B2Aug 2, 2005
Power switch circuit sizing technique
IBM8 citations72
US6677774B2Jan 13, 2004
Method for locating IDDQ defects using multiple controlled collapse chip connections current measurement on an automatic tester
IBM8 citations72
US7146596B2Dec 5, 2006
Integrated circuit chip having a ringed wiring layer interposed between a contact layer and a wiring grid
IBM10 citations71
US7038319B2May 2, 2006
Apparatus and method to reduce signal cross-talk
IBM8 citations71
US6483720B1Nov 19, 2002
EMC protection in digital computers
IBM5 citations62
US7454723B2Nov 18, 2008
Validation of electrical performance of an electronic package prior to fabrication
IBM2 citations60
US7000203B2Feb 14, 2006
Efficient and comprehensive method to calculate IC package or PCB trace mutual inductance using circular segments and lookup tables
IBM0 citations45