Inventor
HINOJOSA JOAQUIN
US9 patents
Patents
9 patentsUS5502732AMar 26, 1996
Method for testing ECC logic
IBM71 citations93
US7389400B2Jun 17, 2008
Apparatus and method for selectively invalidating entries in an address translation cache
IBM22 citations92
US7350051B2Mar 25, 2008
Method to optimize effective page number to real page number translation path from page table entries match resumption of execution stream
IBM15 citations92
US5446845AAug 29, 1995
Steering logic to directly connect devices having different data word widths
IBM35 citations90
US7822942B2Oct 26, 2010
Selectively invalidating entries in an address translation cache
IBM7 citations73
US7116569B2Oct 3, 2006
Method and apparatus for selecting operating characteristics of a content addressable memory by using a compare mask
IBM7 citations71
US6981128B2Dec 27, 2005
Atomic quad word storage in a simultaneous multithreaded system
IBM5 citations60
US7752354B2Jul 6, 2010
Auxiliary mechanism to manage instruction restart and restart coming in a lookahead processor
IBM1 citations51
US7660965B2Feb 9, 2010
Method to optimize effective page number to real page number translation path from page table entries match resumption of execution stream
IBM1 citations51