Inventor

YANO KOUSAKU

JP30 patents

⚠️ This page may combine multiple inventors who share the name “YANO KOUSAKU”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

YANO KOUSAKU

MATSUSHITA ELECTRIC INDUSTRIAL CO LTD

Multi-layer wiring structure having varying-sized cutouts

Semiconductor device and associated fabrication method

Thin layer forming method wherein hydrophobic molecular layers preventing a BPSG layer from absorbing moisture

Apparatus and method for forming thin film

Method for fabricating interconnection structure

Semiconductor device and its manufacturing method

Semiconductor device with a field-effect transistor having a lower resistance impurity diffusion layer, and method of manufacturing the same

Method for manufacturing a semiconductor device involving forming two silicon oxide layers by CVD and forming HMDS between the silicon oxide layers

Apparatus and method for forming thin film

Method of preventing diffusion between interconnect and plug

Semiconductor device and associated fabrication method

Semiconductor device and method of fabricating the same

Method for forming a multi-layer metallic wiring structure

Method of preventing the corrosion of metallic wirings

Memory device with tungsten and aluminum interconnects

Semiconductor device comprising MISFETS and method of manufacturing the same

Semiconductor device fabrication method

Stripe-color filter

Multilayer wiring structure of semiconductor device, method of producing said multilayer wiring structure and semiconductor device to be used for reliability evaluation

Multilayer wiring structure of semiconductor device, method of producing said multilayer wiring structure and semiconductor device to be used for reliability evaluation

Layer forming material and wiring forming method

Layer forming material and wiring forming method

Method for forming a memory device by utilizing variations in resistance value

Multilayer wiring structure of semiconductor device, method of producing said multilayer wiring structure and semiconductor device to be used for reliability evaluation

Multilayer wiring structure of semiconductor device, method of producing said multilayer wiring structure and semiconductor device to be used for reliability evaluation

PANASONIC CORP

Multilayer wiring structure of semiconductor device, method of producing said multilayer wiring structure and semiconductor device to be used for reliability evaluation

Multilayer wiring structure of semiconductor device, method of producing said multilayer wiring structure and semiconductor to be used for reliability evaluation

MATSUSHITA ELECTRONICS CORP

Method of producing multilayer wiring device with offset axises of upper and lower plugs

MATSUSHITA ELECTRIC IND CO LD

Semiconductor device and process

DOMAE SHINICHI

Multilayer wiring structure of semiconductor device, method of producing said multilayer wiring structure and semiconductor device to be used for reliability evaluation