Inventor
WICHMAN SHANNON A
US20 patents
⚠️ This page may combine multiple inventors who share the name “WICHMAN SHANNON A”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
TEXAS INSTRUMENTS INC
9 patentsUS6421754B1Jul 16, 2002
System management mode circuits, systems and methods
TEXAS INSTRUMENTS INC213 citations98
US6112273AAug 29, 2000
Method and apparatus for handling system management interrupts (SMI) as well as, ordinary interrupts of peripherals such as PCMCIA cards
TEXAS INSTRUMENTS INC92 citations97
US5943507AAug 24, 1999
Interrupt routing circuits, systems and methods
TEXAS INSTRUMENTS INC123 citations97
US5684997ANov 4, 1997
Integrated circuit design for handling of system management interrupts (SMI)
TEXAS INSTRUMENTS INC101 citations97
US5552726ASep 3, 1996
High resolution digital phase locked loop with automatic recovery logic
TEXAS INSTRUMENTS INC60 citations96
US5884062AMar 16, 1999
Microprocessor with pipeline status integrity logic for handling multiple stage writeback exceptions
TEXAS INSTRUMENTS INC31 citations92
US5822579AOct 13, 1998
Microprocessor with dynamically controllable microcontroller condition selection
TEXAS INSTRUMENTS INC10 citations73
US5712991AJan 27, 1998
Buffer memory for I/O writes programmable selective
TEXAS INSTRUMENTS INC9 citations71
US5630108AMay 13, 1997
Frequency independent PCMCIA control signal timing
TEXAS INSTRUMENTS INC3 citations60
LSI LOGIC CORP
7 patentsUS6889318B1May 3, 2005
Instruction fusion for digital signal processor
LSI LOGIC CORP55 citations96
US7079147B2Jul 18, 2006
System and method for cooperative operation of a processor and coprocessor
LSI LOGIC CORP36 citations86
US6531903B1Mar 11, 2003
Divider circuit, method of operation thereof and a phase-locked loop circuit incorporating the same
LSI LOGIC CORP15 citations84
US6973630B1Dec 6, 2005
System and method for reference-modeling a processor
LSI LOGIC CORP15 citations81
US7051146B2May 23, 2006
Data processing systems including high performance buses and interfaces, and associated communication methods
LSI LOGIC CORP5 citations63
US6745314B1Jun 1, 2004
Circular buffer control circuit and method of operation thereof
LSI LOGIC CORP6 citations62
US6963961B1Nov 8, 2005
Increasing DSP efficiency by independent issuance of store address and data
LSI LOGIC CORP1 citations51
VERISILICON HOLDINGS CAYMAN IS
2 patentsUS7251721B1Jul 31, 2007
Conditional link pointer register sets marking the beginning and end of a conditional instruction block where each set corresponds to a single stage of a pipeline that moves link pointers through each corresponding register of said register sets as instructions move through the pipeline
VERISILICON HOLDINGS CAYMAN IS11 citations84
US7231510B1Jun 12, 2007
Pipelined multiply-accumulate unit and out-of-order completion logic for a superscalar digital signal processor and method of operation thereof
VERISILICON HOLDINGS CAYMAN IS4 citations62