Inventor

PARAGAONKAR CHETAN

IN3 patents

⚠️ This page may combine multiple inventors who share the name “PARAGAONKAR CHETAN”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

PARAGAONKAR CHETAN

1 patent

US8601169B1Dec 3, 2013

Method and apparatus for a multi-engine descriptor controller for distributing data processing tasks across the engines

PARAGAONKAR CHETAN20 citations85

PMC SIERRA US INC

1 patent

US8782295B2Jul 15, 2014

Method and apparatus for a multi-engine descriptor controller for distributing data processing tasks across the engines

PMC SIERRA US INC7 citations80

CADENCE DESIGN SYSTEMS INC

1 patent

US11128410B1Sep 21, 2021

Hardware-efficient scheduling of packets on data paths

CADENCE DESIGN SYSTEMS INC0 citations55