Inventor

YANG CHANSYUN DAVID

TW45 patents

⚠️ This page may combine multiple inventors who share the name “YANG CHANSYUN DAVID”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

YANG CHANSYUN DAVID

TAIWAN SEMICONDUCTOR MFG CO LTD

Power rails for stacked semiconductor device

Laser interference fringe control for higher EUV light source and EUV throughput

Laser interference fringe control for higher EUV light source and EUV throughput

Field effect transistor with negative capacitance dielectric structures

Independent control of stacked semiconductor device

Field effect transistors with negative capacitance layers

Radical-activated etching of metal oxides

Laser interference fringe control for higher EUV light source and EUV throughput

Field effect transistor with negative capacitance dieletric structures

Transistor spacer structures

Memory devices, semiconductor devices, and methods of operating a memory device

Plasma-assisted etching of metal oxides

Grid structures of ion beam etching (IBE) systems

Method for fabricating an integrated circuit comprising devices on opposing sides of a substrate

Power rails for stacked semiconductor device

Method for selectively removing predetermined part of selected element in semiconductor structure

Method of manufacturing integrated circuit

Semiconductor device structure with inner spacer layer

Radical-activated etching of metal oxides

Field effect transistor with negative capacitance dielectric structures

Inner spacer formation in multi-gate transistors

Independent control of stacked semiconductor device

Memory devices, semiconductor devices, and methods of operations a memory device

Nanostructured channel regions for semiconductor devices

Field effect transistors with negative capacitance layers

Semiconductor device structure with inner spacer layer and method for forming the same

Grid structures of ion beam etching (IBE) systems

Independent control of stacked semiconductor device

Nanostructured channel regions for semiconductor devices

Power rails for stacked semiconductor device

Transistor spacer structures

Inner spacer formation in multi-gate transistors

Field effect transistor with negative capacitance dielectric structures

Field effect transistors with negative capacitance layers

Apparatus and method for directional etch with micron zone beam and angle control

Semiconductor device structure with inner spacer layer

Apparatus and method for directional etch with micron zone beam and angle control

Plasma-assisted etching of metal oxides

Structure and formation method of semiconductor device with metal gate stack

Method for forming semiconductor device structure with inner spacer layer

Inner spacer formation in multi-gate transistors

Semiconductor device with tunable threshold voltage and method for manufacturing the same

Gate structures for semiconductor devices

Nanowire stack GAA device and methods for producing the same

LEE GENE H

Method of controlling trench microloading using plasma pulsing