Inventor

GAO PEI-YUAN

US17 patents

⚠️ This page may combine multiple inventors who share the name “GAO PEI-YUAN”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

GAO PEI-YUAN

ADVANCED MICRO DEVICES INC

CVD silicon carbide layer as a BARC and hard mask for gate patterning

Multi-chamber deposition of silicon oxynitride film for patterning

Method for forming a hardmask employing multiple independently formed layers of a pecvd material to reduce pinholes

Method for reducing pattern deformation and photoresist poisoning in semiconductor device fabrication

PECVD silicon-rich oxide layer for reduced UV charging

Method of inspecting a semiconductor wafer for defects

Method of forming a void-free interlayer dielectric (ILD0) for 0.18-μm flash memory technology and semiconductor device thereby formed

Method of depositing sion with reduced defects

Semiconductor wafer for measurement and recordation of impurities in semiconductor insulators

Method to rework device with faulty metal stack layer

Undoped oxide liner/BPSG for improved data retention

Method for forming a hardmask employing multiple independently formed layers of a capping material to reduce pinholes

Void-free interlayer dielectric (ILD0) for 0.18-micron flash memory semiconductor device

SPANSION LLC

Interlayer dielectric for charge loss improvement

Semiconductor memory with data retention liner

FASL LLC

Liner for semiconductor memories and manufacturing method therefor

NICKEL ALEXANDER H

Low-H plasma treatment with N2 anneal for electronic memory devices