Inventor
DUGGIRALA SURYANARAYANA
US13 patents
Patents
13 patentsUS7418640B2Aug 26, 2008
Dynamically reconfigurable shared scan-in test architecture
SYNOPSYS INC28 citations94
US7900105B2Mar 1, 2011
Dynamically reconfigurable shared scan-in test architecture
SYNOPSYS INC15 citations92
US6766501B1Jul 20, 2004
System and method for high-level test planning for layout
SYNOPSYS INC34 citations92
US6434733B1Aug 13, 2002
System and method for high-level test planning for layout
SYNOPSYS INC39 citations92
US6405355B1Jun 11, 2002
Method for placement-based scan-in and scan-out ports selection
SYNOPSYS INC43 citations92
US7774663B2Aug 10, 2010
Dynamically reconfigurable shared scan-in test architecture
SYNOPSYS INC8 citations83
US7596733B2Sep 29, 2009
Dynamically reconfigurable shared scan-in test architecture
SYNOPSYS INC8 citations83
US6269463B1Jul 31, 2001
Method and system for automatically determining transparency behavior of non-scan cells for combinational automatic test pattern generation
SYNOPSYS INC17 citations79
US7836367B2Nov 16, 2010
Dynamically reconfigurable shared scan-in test architecture
SYNOPSYS INC7 citations73
US7836368B2Nov 16, 2010
Dynamically reconfigurable shared scan-in test architecture
SYNOPSYS INC3 citations73
US11829692B1Nov 28, 2023
Machine-learning-based design-for-test (DFT) recommendation system for improving automatic test pattern generation (ATPG) quality of results (QOR)
SYNOPSYS INC4 citations67
US7743299B2Jun 22, 2010
Dynamically reconfigurable shared scan-in test architecture
SYNOPSYS INC2 citations62
US12333227B1Jun 17, 2025
Machine-learning-based design-for-test (DFT) recommendation system for improving automatic test pattern generation (ATPG) quality of results (QoR)
SYNOPSYS INC0 citations55