P

Inventor

HWANG JACK

US27 patents
⚠️ This page may combine multiple inventors who share the name “HWANG JACK”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

INTEL CORP

22 patents
US9466565B2Oct 11, 2016

Self-aligned contacts

INTEL CORP24 citations97
US9508821B2Nov 29, 2016

Self-aligned contacts

INTEL CORP13 citations92
US7439113B2Oct 21, 2008

Forming dual metal complementary metal oxide semiconductor integrated circuits

INTEL CORP23 citations92
US7102141B2Sep 5, 2006

Flash lamp annealing apparatus to generate electromagnetic radiation having selective wavelengths

INTEL CORP19 citations91
US6638802B1Oct 28, 2003

Forming strained source drain junction field effect transistors

INTEL CORP35 citations89
US11887891B2Jan 30, 2024

Self-aligned contacts

INTEL CORP2 citations84
US10930557B2Feb 23, 2021

Self-aligned contacts

INTEL CORP2 citations84
US10141226B2Nov 27, 2018

Self-aligned contacts

INTEL CORP2 citations84
US7223660B2May 29, 2007

Flash assisted annealing

INTEL CORP13 citations84
US7758238B2Jul 20, 2010

Temperature measurement with reduced extraneous infrared in a processing chamber

INTEL CORP8 citations80
US7109443B2Sep 19, 2006

Multi-zone reflecting device for use in flash lamp processes

INTEL CORP16 citations80
US7479431B2Jan 20, 2009

Strained NMOS transistor featuring deep carbon doped regions and raised donor doped source and drain

INTEL CORP6 citations73
US6936518B2Aug 30, 2005

Creating shallow junction transistors

INTEL CORP8 citations73
US6808993B2Oct 26, 2004

Ultra-thin gate dielectrics

INTEL CORP8 citations65
US12266571B2Apr 1, 2025

Self-aligned contacts

INTEL CORP0 citations62
US11600524B2Mar 7, 2023

Self-aligned contacts

INTEL CORP0 citations62
US7892971B2Feb 22, 2011

Sub-second annealing processes for semiconductor devices

INTEL CORP5 citations59
US6911706B2Jun 28, 2005

Forming strained source drain junction field effect transistors

INTEL CORP2 citations59
US10629483B2Apr 21, 2020

Self-aligned contacts

INTEL CORP0 citations52
US9892967B2Feb 13, 2018

Self-aligned contacts

INTEL CORP0 citations52
US7858981B2Dec 28, 2010

Strained NMOS transistor featuring deep carbon doped regions and raised donor doped source and drain

INTEL CORP0 citations52
US7790587B2Sep 7, 2010

Method to reduce junction leakage through partial regrowth with ultrafast anneal and structures formed thereby

INTEL CORP0 citations47

BOHR MARK T

3 patents

CHIH LIU P

1 patent

HATTENDORF MICHAEL L

1 patent