Inventor
MATHENY ADAM
US8 patents
Patents
8 patentsUS11176301B2Nov 16, 2021
Noise impact on function (NIOF) reduction for integrated circuit design
IBM1 citations58
US11030376B2Jun 8, 2021
Net routing for integrated circuit (IC) design
IBM0 citations58
US10885243B1Jan 5, 2021
Logic partition reporting for integrated circuit design
IBM1 citations58
US10831938B1Nov 10, 2020
Parallel power down processing of integrated circuit design
IBM1 citations58
US10831953B1Nov 10, 2020
Logic partition identifiers for integrated circuit design
IBM1 citations58
US10943040B1Mar 9, 2021
Clock gating latch placement
IBM0 citations57
US10878152B1Dec 29, 2020
Single-bit latch optimization for integrated circuit (IC) design
IBM1 citations54
US10831966B1Nov 10, 2020
Multi-fanout latch placement optimization for integrated circuit (IC) design
IBM0 citations37