P

Inventor

MINOPOLI DIONISIO

IT22 patents

Patents

22 patents
US11036625B1Jun 15, 2021

Host-resident translation layer write command associated with logical block to physical address of a memory device

MICRON TECHNOLOGY INC30 citations94
US8014208B1Sep 6, 2011

Erase verification for flash memory

MICRON TECHNOLOGY INC7 citations78
US7995365B1Aug 9, 2011

Method and apparatuses for managing double data rate in non-volatile memory

MICRON TECHNOLOGY INC10 citations78
US11693781B2Jul 4, 2023

Caching or evicting host-resident translation layer based on counter

MICRON TECHNOLOGY INC3 citations73
US11074192B2Jul 27, 2021

Logical to physical table fragments

MICRON TECHNOLOGY INC2 citations73
US10592427B2Mar 17, 2020

Logical to physical table fragments

MICRON TECHNOLOGY INC3 citations73
US12530153B2Jan 20, 2026

Techniques for atomic write operations

MICRON TECHNOLOGY INC0 citations62
US12112064B2Oct 8, 2024

Techniques for atomic write operations

MICRON TECHNOLOGY INC0 citations62
US12100438B2Sep 24, 2024

Methods, devices and systems for an improved management of a non-volatile memory

MICRON TECHNOLOGY INC0 citations62
US11829646B2Nov 28, 2023

Memory device performance based on storage traffic pattern detection

MICRON TECHNOLOGY INC0 citations62
US11782854B2Oct 10, 2023

Cache architecture for a storage device

MICRON TECHNOLOGY INC0 citations62
US11669461B2Jun 6, 2023

Logical to physical table fragments

MICRON TECHNOLOGY INC0 citations62
US11656983B2May 23, 2023

Host-resident translation layer write command

MICRON TECHNOLOGY INC0 citations62
US11392515B2Jul 19, 2022

Cache architecture for a storage device

MICRON TECHNOLOGY INC0 citations62
US11314456B2Apr 26, 2022

Memory device performance based on storage traffic pattern detection

MICRON TECHNOLOGY INC0 citations62
US11461228B2Oct 4, 2022

Multilevel addressing

MICRON TECHNOLOGY INC0 citations61
US11132311B2Sep 28, 2021

Interface for memory having a cache and multiple independent arrays

MICRON TECHNOLOGY INC0 citations61
US12183407B2Dec 31, 2024

Setting switching for single-level cells

MICRON TECHNOLOGY INC0 citations59
US12223204B2Feb 11, 2025

Memory-aligned access operations

MICRON TECHNOLOGY INC0 citations52
US11861370B2Jan 2, 2024

Automotive boot optimization by utilizing multiple phases of boot-up procedures

MICRON TECHNOLOGY INC0 citations51
US10860474B2Dec 8, 2020

Multilevel addressing

MICRON TECHNOLOGY INC0 citations50
US10534731B2Jan 14, 2020

Interface for memory having a cache and multiple independent arrays

MICRON TECHNOLOGY INC0 citations50