P

Inventor

THEN HAN WUI

US256 patents
⚠️ This page may combine multiple inventors who share the name “THEN HAN WUI”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

INTEL CORP

29 patents
US11233053B2Jan 25, 2022

Group III-nitride (III-N) devices with reduced contact resistance and their methods of fabrication

INTEL CORP6 citations86
US10431717B1Oct 1, 2019

Light-emitting diode (LED) and micro LED substrates and methods for making the same

INTEL CORP17 citations86
US10720505B2Jul 21, 2020

Ferroelectric-based field-effect transistor with threshold voltage switching for enhanced on-state and off-state performance

INTEL CORP10 citations84
US10658471B2May 19, 2020

Transition metal dichalcogenides (TMDCS) over III-nitride heteroepitaxial layers

INTEL CORP8 citations84
US10541305B2Jan 21, 2020

Group III-N nanowire transistors

INTEL CORP4 citations84
US10325774B2Jun 18, 2019

Wurtzite heteroepitaxial structures with inclined sidewall facets for defect propagation control in silicon CMOS-compatible semiconductor devices

INTEL CORP8 citations84
US10229991B2Mar 12, 2019

III-N epitaxial device structures on free standing silicon mesas

INTEL CORP6 citations84
US10186581B2Jan 22, 2019

Group III-N nanowire transistors

INTEL CORP4 citations84
US10096683B2Oct 9, 2018

Group III-N transistor on nanoscale template structures

INTEL CORP5 citations84
US10056456B2Aug 21, 2018

N-channel gallium nitride transistors

INTEL CORP8 citations84
US10026845B2Jul 17, 2018

Deep gate-all-around semiconductor device having germanium or group III-V active layer

INTEL CORP5 citations84
US9847448B2Dec 19, 2017

Forming LED structures on silicon fins

INTEL CORP8 citations84
US9806203B2Oct 31, 2017

Nonplanar III-N transistors with compositionally graded semiconductor channels

INTEL CORP7 citations84
US9755062B2Sep 5, 2017

III-N material structure for gate-recessed transistors

INTEL CORP7 citations84
US9716149B2Jul 25, 2017

Group III-N transistors on nanoscale template structures

INTEL CORP5 citations84
US9660064B2May 23, 2017

Low sheet resistance GaN channel on Si substrates using InAlN and AlGaN bi-layer capping stack

INTEL CORP15 citations84
US9530878B2Dec 27, 2016

III-N material structure for gate-recessed transistors

INTEL CORP8 citations84
US9397188B2Jul 19, 2016

Group III-N nanowire transistors

INTEL CORP7 citations84
US9391181B2Jul 12, 2016

Lattice mismatched hetero-epitaxial film

INTEL CORP10 citations84
US9373693B2Jun 21, 2016

Nonplanar III-N transistors with compositionally graded semiconductor channels

INTEL CORP5 citations84
US9362369B2Jun 7, 2016

Group III-N transistors on nanoscale template structures

INTEL CORP3 citations84
US9209290B2Dec 8, 2015

III-N material structure for gate-recessed transistors

INTEL CORP11 citations84
US8872225B2Oct 28, 2014

Defect transferred and lattice mismatched epitaxial film

INTEL CORP12 citations84
US9590069B2Mar 7, 2017

Self-aligned structures and methods for asymmetric GaN transistors and enhancement mode operation

INTEL CORP5 citations83
US9029835B2May 12, 2015

Epitaxial film on nanoscale structure

INTEL CORP13 citations82
US12199018B2Jan 14, 2025

Direct bonding in microelectronic assemblies

INTEL CORP2 citations75
US12107060B2Oct 1, 2024

Microelectronic assemblies with inductors in direct bonding regions

INTEL CORP5 citations75
US11387328B2Jul 12, 2022

III-N tunnel device architectures and high frequency mixers employing a III-N tunnel device

INTEL CORP6 citations75
US12062631B2Aug 13, 2024

Microelectronic assemblies with inductors in direct bonding regions

INTEL CORP4 citations74

PILLARISETTY RAVI

7 patents

THEN HAN WUI

7 patents

UNIV ILLINOIS

3 patents

DEWEY GILBERT

1 patent

RADOSAVLJEVIC MARKO

1 patent

WALTER GABRIEL

1 patent

DASGUPTA SANSAPTAK

1 patent

Showing the top 50 of 256 patents by PatentIndex Score.