Inventor

HEWITT LARRY

US27 patents

⚠️ This page may combine multiple inventors who share the name “HEWITT LARRY”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

HEWITT LARRY

ADVANCED MICRO DEVICES INC

Wavetable cache using simplified looping

Computer system and method for transferring commands and data to a dedicated multimedia engine

Communication link with isochronous and asynchronous priority modes coupling bridge circuits in a computer system

Method of mode control in a bus optimized for personal computer data traffic

Computer system having an improved digital and analog configuration

Computer system having a dedicated multimedia engine and multimedia memory having arbitration logic which grants main memory access to either the CPU or multimedia engine

Computer system and method having a dedicated multimedia engine and including separate command and data paths

Method and apparatus for monitoring universal serial bus activity

Control circuit for switching a processor between multiple low power states to allow cache snoops

Circuit and method for selectively stalling interrupt requests initiated by devices coupled to a multiprocessor system

Computer system with a data cache for providing real-time multimedia data to a multimedia engine

Computer system which includes a local expansion bus and a dedicated real-time bus and including a multimedia memory for increased multi-media performance

Digital method to eliminate power-on pops and clicks

Digital audio system including a software controlled phase lock loop for synchronizing audio sources to a common clock source

Computer system having a dedicated multimedia engine including multimedia memory

Computer system and method for implementing delay-based effects using system memory

Address space conversion to retain software compatibility in new architectures

Collation of interrupt control devices

Zoned thermal monitoring

System and method for performing data transfers during PCI idle clock cycles

Using a control line to insert a control message during a data transfer on a bus

Vertical wavetable cache architecture in which the number of queues is substantially smaller than the total number of voices stored in the system memory

Computer system which includes a local expansion bus and a dedicated real-time bus for increased multimedia performance

ADVANCED MICROSYSTEMS INC

Computer system having separate digital and analog system chips for improved performance

(unassigned)

Hydraulic watercraft lift

BARTH FRANK

Buffering non-posted read commands and responses

AVANCED MICRO DEVICES INC

System for increasing multimedia performance and other real time applications by including a local expansion bus and a multimedia bus on the computer system motherboard