Inventor
DANAN YANAI
US5 patents
Patents
5 patentsUS10394986B2Aug 27, 2019
Model order reduction in transistor level timing
IBM2 citations71
US9501608B1Nov 22, 2016
Timing analysis of circuits using sub-circuit timing models
IBM4 citations71
US10949593B2Mar 16, 2021
Model order reduction in transistor level timing
IBM0 citations61
US10031988B2Jul 24, 2018
Model order reduction in transistor level timing
IBM1 citations61
US11474821B1Oct 18, 2022
Processor dependency-aware instruction execution
IBM0 citations41