Inventor

RAO VASANT

US14 patents

⚠️ This page may combine multiple inventors who share the name “RAO VASANT”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

IBM

10 patents

US7353359B2Apr 1, 2008

Affinity-based clustering of vectors for partitioning the columns of a matrix

IBM11 citations84

US7325210B2Jan 29, 2008

Hybrid linear wire model approach to tuning transistor widths of circuits with RC interconnect

IBM17 citations81

US9690899B2Jun 27, 2017

SOREFF JEFFREY P

1 patent

US8201120B2Jun 12, 2012

Timing point selection for a static timing analysis in the presence of interconnect electrical elements

SOREFF JEFFREY P4 citations56

BORKAM FRANK

1 patent

US8776004B2Jul 8, 2014

Method for improving static timing analysis and optimizing circuits using reverse merge

BORKAM FRANK2 citations52

KALAFALA KERIM

1 patent

US8112735B2Feb 7, 2012

Affinity-based clustering of vectors for partitioning the columns of a matrix

KALAFALA KERIM0 citations50

HATHAWAY DAVID J

1 patent

US8655634B2Feb 18, 2014

Modeling loading effects of a transistor network

HATHAWAY DAVID J1 citations47

RAO VASANT

IBM

Affinity-based clustering of vectors for partitioning the columns of a matrix

Hybrid linear wire model approach to tuning transistor widths of circuits with RC interconnect

Prioritized path tracing in statistical timing analysis of integrated circuits

Model order reduction in transistor level timing

Affinity-based clustering of vectors for partitioning the columns of a matrix

Statistical timing analysis considering multiple-input switching

Model order reduction in transistor level timing

Model order reduction in transistor level timing

System and method for improved hierarchical analysis of electronic circuits

Deterministic and statistical timing modeling for differential circuits

SOREFF JEFFREY P

Timing point selection for a static timing analysis in the presence of interconnect electrical elements

BORKAM FRANK

Method for improving static timing analysis and optimizing circuits using reverse merge

KALAFALA KERIM

Affinity-based clustering of vectors for partitioning the columns of a matrix

HATHAWAY DAVID J

Modeling loading effects of a transistor network