Inventor
CHEN JUN W
US16 patents
Patents
16 patentsUS5426328AJun 20, 1995
BICDMOS structures
SILICONIX INC143 citations99
US5374569ADec 20, 1994
Method for forming a BiCDMOS
SILICONIX INC119 citations99
US5618743AApr 8, 1997
MOS transistor having adjusted threshold voltage formed along with other transistors
SILICONIX INC32 citations96
US5559044ASep 24, 1996
BiCDMOS process technology
SILICONIX INC70 citations96
US5541125AJul 30, 1996
Method for forming a lateral MOS transistor having lightly doped drain formed along with other transistors in the same substrate
SILICONIX INC44 citations96
US5541123AJul 30, 1996
Method for forming a bipolar transistor having selected breakdown voltage
SILICONIX INC31 citations96
US5416039AMay 16, 1995
Method of making BiCDMOS structures
SILICONIX INC43 citations96
US5521409AMay 28, 1996
Structure of power mosfets, including termination structures
SILICONIX INC47 citations95
US5304831AApr 19, 1994
Low on-resistance power MOS technology
SILICONIX INC62 citations95
US5404040AApr 4, 1995
Structure and fabrication of power MOSFETs, including termination structures
SILICONIX INC104 citations94
US5583061ADec 10, 1996
PMOS transistors with different breakdown voltages formed in the same substrate
SILICONIX INC20 citations93
US5547880AAug 20, 1996
Method for forming a zener diode region and an isolation region
SILICONIX INC23 citations93
US5422508AJun 6, 1995
BiCDMOS structure
SILICONIX INC30 citations93
US5429964AJul 4, 1995
Low on-resistance power MOS technology
SILICONIX INC35 citations92
US5420451AMay 30, 1995
Bidirectional blocking lateral MOSFET with improved on-resistance
SILICONIX INC26 citations90
US5451533ASep 19, 1995
Bidirectional blocking lateral MOSFET with improved on-resistance
SILICONIX INC18 citations80