Inventor

SHIMAZU YUKIHIKO

JP31 patents

⚠️ This page may combine multiple inventors who share the name “SHIMAZU YUKIHIKO”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

SHIMAZU YUKIHIKO

MITSUBISHI ELECTRIC CORP

MOS integrated circuit with low power consumption

Semiconductor integrated circuit with self-test function

Semiconductor device having a library of standard cells and method of designing the same

Clock generating circuit, PLL circuit, semiconductor device, and methods for designing and making the clock generating circuit

Integrated circuit with reduced clock skew and divided power supply lines

Programmable clock frequency divider

Microprocessor with Harvard Architecture

Automatic placement and routing device

Auto placement and routing device and semiconductor integrated circuit

Integrated circuit with reduced clock skew

Clock system implementing divided power supply wiring

Semiconductor intergrated circuit

Microcomputer

Semiconductor memory device having initialization transistor

Digital delay circuit and digital PLL circuit with first and second delay units

Comparator circuit

High speed full adder using complementary input-output signals

Microprocessor with reset execution from an arbitrary address

Microprocessor with reset execution from an arbitrary address

Integrated circuit with reduced clock skew

Semiconductor device comprising CPU and peripheral circuit wherein control unit performs wait cycle control that makes peripheral circuit wait a predetermined time before responding to CPU

Serial data input circuit for the shifting-in of variable length data

Processing apparatus having reduced bus lengths between operating units and register file

Data processor capable of handling an increased number of operation codes

Data processing circuit

Adder circuit apparatus

Coded incrementer having minimal carry propagation delay

Semiconductor integrated circuit

RENESAS TECH CORP

Data processing unit including central unit and peripheral unit driven by separate power supplies

Semiconductor integrated circuit capable of testing with small scale circuit configuration

Bus control circuit effecting timing control using cycle registers for respective cycles holding signal levels corresponding to bus control signals that are output by arrangement of signal level