Inventor · disambiguated record
Veeresh V. Deshpande
Also filed as: DESHPANDE VEERESH · DESHPANDE VEERESH V · DESHPANDE VEERESH VIDYADHAR
33 granted patents·80 citations·filing 2014–2021
95Inventor score
Files withIBM31IHP GMBH INNOVATIONS FOR HIGH PERFORMANCE MICROELECTRONICS / LEIBNIZ INST FUR INNOVATIVE MIKRO1IMEC VZW1
Top patents by PatentIndex Score
33 records- 0195US9570169B1Resistive memory deviceIBM·Filed 2016·Granted Feb 14, 2017·30 cites·20 claims
- 0291US10312441B1Tunable resistive elementIBM·Filed 2018·Granted Jun 4, 2019·8 cites·19 claims
- 0389US9984929B1Fabricating contacts of a CMOS structureIBM·Filed 2017·Granted May 29, 2018·4 cites·19 claims
- 0486US11157807B2Optical neuronIBM·Filed 2018·Granted Oct 26, 2021·6 cites·18 claims
- 0583US10657440B2Optical synapse for neuromorphic networksIBM·Filed 2015·Granted May 19, 2020·7 cites·11 claims
- 0680US10516108B2Tunable resistive elementIBM·Filed 2019·Granted Dec 24, 2019·3 cites·20 claims
- 0780US9881921B2Fabricating a dual gate stack of a CMOS structureIBM·Filed 2017·Granted Jan 30, 2018·2 cites·20 claims
- 0878US9977325B2Modifying design layer of integrated circuit (IC)IBM·Filed 2015·Granted May 22, 2018·2 cites·8 claims
- 0978US9786664B2Fabricating a dual gate stack of a CMOS structureIBM·Filed 2016·Granted Oct 10, 2017·2 cites·16 claims
- 1078US9704757B1Fabrication of semiconductor structuresIBM·Filed 2016·Granted Jul 11, 2017·2 cites·21 claims
- 1175US11521055B2Optical synapseIBM·Filed 2018·Granted Dec 6, 2022·2 cites·20 claims
- 1275US10304934B2Fabricating raised source drain contacts of a CMOS structureIBM·Filed 2018·Granted May 28, 2019·1 cites·20 claims
- 1374US10546992B2Buried electrode geometry for lowering surface losses in superconducting microwave circuitsIBM·Filed 2018·Granted Jan 28, 2020·2 cites·18 claims
- 1473US10254642B2Modifying design layer of integrated circuit (IC) using nested and non-nested fill objectsIBM·Filed 2018·Granted Apr 9, 2019·1 cites·12 claims
- 1573US9997409B1Fabricating contacts of a CMOS structureIBM·Filed 2017·Granted Jun 12, 2018·1 cites·1 claims
- 1673US9917164B1Fabricating raised source drain contacts of a CMOS structureIBM·Filed 2017·Granted Mar 13, 2018·1 cites·1 claims
- 1772US11138501B2Hardware-implemented training of an artificial neural networkIBM·Filed 2018·Granted Oct 5, 2021·2 cites·19 claims
- 1868US10395732B2Resistive memory apparatus using variable-resistance channels with high- and low-resistance regionsIBM·Filed 2018·Granted Aug 27, 2019·2 cites·18 claims
- 1968US9953125B2Design/technology co-optimization platform for high-mobility channels CMOS technologyIBM·Filed 2016·Granted Apr 24, 2018·1 cites·18 claims
- 2061US10410926B2Fabricating contacts of a CMOS structureIBM·Filed 2018·Granted Sep 10, 2019·0 cites·15 claims
- 2159US10395168B2Tunable optical neuromorphic networkIBM·Filed 2015·Granted Aug 27, 2019·1 cites·19 claims
- 2259US10103234B1Fabricating raised source drain contacts of a CMOS structureIBM·Filed 2017·Granted Oct 16, 2018·0 cites·18 claims
- 2358US10529771B2Array of optoelectronic structures and fabrication thereofIBM·Filed 2018·Granted Jan 7, 2020·0 cites·19 claims
- 2455US10957854B2Tunable resistive elementIBM·Filed 2019·Granted Mar 23, 2021·0 cites·19 claims
- 2555US9923022B2Array of optoelectronic structures and fabrication thereofIBM·Filed 2016·Granted Mar 20, 2018·0 cites·19 claims
- 2653US10256092B2Fabrication of semiconductor structuresIBM·Filed 2017·Granted Apr 9, 2019·0 cites·13 claims
- 2752US9451684B2Dual pulse driven extreme ultraviolet (EUV) radiation source methodIBM·Filed 2016·Granted Sep 20, 2016·0 cites·19 claims
- 2851US11988904B2Slot waveguide for a phase shifter based on ferroelectric materialsIHP GMBH—INNOVATIONS FOR HIGH PERFORMANCE MICROELECTRONICS/ LEIBNIZ INST FUR INNOVATIVE MIKRO·Filed 2021·Granted May 21, 2024·0 cites·18 claims
- 2950US9301381B1Dual pulse driven extreme ultraviolet (EUV) radiation source utilizing a droplet comprising a metal core with dual concentric shells of buffer gasIBM·Filed 2014·Granted Mar 29, 2016·0 cites·20 claims
- 3042US10037800B2Resistive memory apparatus using variable-resistance channels with high- and low-resistance regionsIBM·Filed 2016·Granted Jul 31, 2018·0 cites·16 claims
- 3142US9564452B1Fabrication of hybrid semiconductor circuitsIBM·Filed 2016·Granted Feb 7, 2017·0 cites·24 claims
- 3240US11205716B2Method for forming a heterojunction bipolar transistor and a heterojunction bipolar transistor deviceIMEC VZW·Filed 2019·Granted Dec 21, 2021·0 cites·8 claims
- 3336US9673104B1Fabrication of a CMOS structureIBM·Filed 2016·Granted Jun 6, 2017·0 cites·20 claims
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