Inventor

WONG KENG L

US49 patents

Patents

49 patents

US5412349AMay 2, 1995

PLL clock generator integrated with microprocessor

INTEL CORP123 citations98

US6937075B2Aug 30, 2005

Method and apparatus for reducing lock time in dual charge-pump phase-locked loops

INTEL CORP81 citations97

US5446867AAug 29, 1995

Microprocessor PLL clock circuit with selectable delayed feedback

INTEL CORP89 citations96

US5425074AJun 13, 1995

Fast programmable/resettable CMOS Johnson counters

INTEL CORP79 citations96

US6885233B2Apr 26, 2005

Altering operating frequency and voltage set point of a circuit in response to the operating temperature and instantaneous operating voltage of the circuit

INTEL CORP68 citations95

US6075832AJun 13, 2000

Method and apparatus to dynamically change an operating frequency and operating voltage of an electronic device

INTEL CORP23 citations92

US6809606B2Oct 26, 2004

Voltage ID based frequency control for clock generating circuit

INTEL CORP33 citations92

US6771134B2Aug 3, 2004

Frequency control for clock generating circuit

INTEL CORP19 citations92

US6748549B1Jun 8, 2004

Clocking an I/O buffer, having a selectable phase difference from the system clock, to and from a remote I/O buffer clocked in phase with the system clock

INTEL CORP48 citations92

US6407600B1Jun 18, 2002

Method and apparatus for providing a start-up control voltage

INTEL CORP46 citations92

US6407591B1Jun 18, 2002

Self-configurable clock input buffer compatible with high-voltage single-ended and low-voltage differential clock signals

INTEL CORP25 citations92

US5801561ASep 1, 1998

Power-on initializing circuit

INTEL CORP22 citations92

US5742190AApr 21, 1998

Method and apparatus for clocking latches in a system having both pulse latches and two-phase latches

INTEL CORP21 citations92

US6208169B1Mar 27, 2001

Internal clock jitter detector

INTEL CORP40 citations91

US5712826AJan 27, 1998

Apparatus and a method for embedding dynamic state machines in a static environment

INTEL CORP53 citations91

US5592111AJan 7, 1997

Clock speed limiter for an integrated circuit

INTEL CORP23 citations91

US7308372B2Dec 11, 2007

Phase jitter measurement circuit

INTEL CORP20 citations89

US7024324B2Apr 4, 2006

Delay element calibration

INTEL CORP24 citations89

US6919769B2Jul 19, 2005

Method and apparatus for fast lock acquisition in self-biased phase locked loops

INTEL CORP14 citations84

US7386749B2Jun 10, 2008

Controlling sequence of clock distribution to clock distribution domains

INTEL CORP9 citations83

US6934872B2Aug 23, 2005

Method and apparatus for optimizing clock distribution to reduce the effect of power supply noise

INTEL CORP15 citations83

US6924710B2Aug 2, 2005

Voltage ID based frequency control for clock generating circuit

INTEL CORP13 citations83

US6842056B1Jan 11, 2005

Cascaded phase-locked loops

INTEL CORP12 citations83

US6778033B2Aug 17, 2004

Voltage control for clock generating circuit

INTEL CORP14 citations83

US6531974B1Mar 11, 2003

Controlling time delay

INTEL CORP16 citations83

US6985041B2Jan 10, 2006

Clock generating circuit and method

INTEL CORP15 citations81

US6876717B1Apr 5, 2005

Multi-stage programmable Johnson counter

INTEL CORP9 citations74

US6265925B1Jul 24, 2001

Multi-stage techniques for accurate shutoff of circuit

INTEL CORP13 citations74

US5280605AJan 18, 1994

Clock speed limiter for microprocessor

INTEL CORP15 citations74

US5274337ADec 28, 1993

Clock speed limiter for a microprocessor by comparing clock signal with a predetermined frequency

INTEL CORP13 citations74

US6047383AApr 4, 2000

Multiple internal phase-locked loops for synchronization of chipset components and subsystems operating at different frequencies

INTEL CORP13 citations73

US5111067AMay 5, 1992

Power up reset circuit

INTEL CORP17 citations73

US6614317B2Sep 2, 2003

Variable lock window for a phase locked loop

INTEL CORP11 citations71

US7310020B2Dec 18, 2007

Self-biased phased-locked loop

INTEL CORP8 citations69

US7173461B2Feb 6, 2007

Self-biased phased-locked loop

INTEL CORP9 citations69

US7404099B2Jul 22, 2008

Phase-locked loop having dynamically adjustable up/down pulse widths

INTEL CORP7 citations68

US7408420B2Aug 5, 2008

Multi mode clock generator

INTEL CORP6 citations63

US7199624B2Apr 3, 2007

Phase locked loop system capable of deskewing

INTEL CORP2 citations63

US7197659B2Mar 27, 2007

Global I/O timing adjustment using calibrated delay elements

INTEL CORP4 citations63

US7184503B2Feb 27, 2007

Multi-loop circuit capable of providing a delayed clock in phase locked loops

INTEL CORP4 citations63

US7023945B2Apr 4, 2006

Method and apparatus for jitter reduction in phase locked loops

INTEL CORP3 citations63

US6469533B1Oct 22, 2002

Measuring a characteristic of an integrated circuit

INTEL CORP4 citations62

US7242261B2Jul 10, 2007

Voltage control for clock generating circuit

INTEL CORP0 citations51

US7498892B2Mar 3, 2009

Split-biased interpolated voltage-controlled oscillator and phase locked loop

INTEL CORP0 citations45

WONG KENG L

Patents

PLL clock generator integrated with microprocessor

Method and apparatus for reducing lock time in dual charge-pump phase-locked loops

Microprocessor PLL clock circuit with selectable delayed feedback

Fast programmable/resettable CMOS Johnson counters

Altering operating frequency and voltage set point of a circuit in response to the operating temperature and instantaneous operating voltage of the circuit

Method and apparatus for deskewing clock signals

Method and apparatus for power management of an integrated circuit

Method and apparatus supplying synchronous clock signals to circuit components

Pulsed flip-flop circuit

Method and apparatus for selecting modes of an intergrated circuit

Method and apparatus to dynamically change an operating frequency and operating voltage of an electronic device

Voltage ID based frequency control for clock generating circuit

Frequency control for clock generating circuit

Clocking an I/O buffer, having a selectable phase difference from the system clock, to and from a remote I/O buffer clocked in phase with the system clock

Method and apparatus for providing a start-up control voltage

Self-configurable clock input buffer compatible with high-voltage single-ended and low-voltage differential clock signals

Power-on initializing circuit

Method and apparatus for clocking latches in a system having both pulse latches and two-phase latches

Internal clock jitter detector

Apparatus and a method for embedding dynamic state machines in a static environment

Clock speed limiter for an integrated circuit

Phase jitter measurement circuit

Delay element calibration

Method and apparatus for fast lock acquisition in self-biased phase locked loops

Controlling sequence of clock distribution to clock distribution domains

Method and apparatus for optimizing clock distribution to reduce the effect of power supply noise

Voltage ID based frequency control for clock generating circuit

Cascaded phase-locked loops

Voltage control for clock generating circuit

Controlling time delay

Clock generating circuit and method

Multi-stage programmable Johnson counter

Multi-stage techniques for accurate shutoff of circuit

Clock speed limiter for microprocessor

Clock speed limiter for a microprocessor by comparing clock signal with a predetermined frequency

Multiple internal phase-locked loops for synchronization of chipset components and subsystems operating at different frequencies

Power up reset circuit

Variable lock window for a phase locked loop

Self-biased phased-locked loop

Self-biased phased-locked loop

Phase-locked loop having dynamically adjustable up/down pulse widths

Multi mode clock generator

Phase locked loop system capable of deskewing

Global I/O timing adjustment using calibrated delay elements

Multi-loop circuit capable of providing a delayed clock in phase locked loops

Method and apparatus for jitter reduction in phase locked loops

Measuring a characteristic of an integrated circuit

Voltage control for clock generating circuit

Split-biased interpolated voltage-controlled oscillator and phase locked loop