Inventor

YAMAGATA TADATO

JP46 patents

⚠️ This page may combine multiple inventors who share the name “YAMAGATA TADATO”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

YAMAGATA TADATO

MITSUBISHI ELECTRIC CORP

Semiconductor integrated circuit device having hierarchical power source arrangement

Dynamic content addressable memory device and a method of operating thereof

Multi-bank semiconductor memory device suitable for integration with logic

Semiconductor integrated circuit device having hierarchical power source arrangement

Semiconductor integrated circuit device having hierarchical power source arrangement

Semiconductor integrated circuit device having hierarchical power source arrangement

Semiconductor integrated circuit device having hierarchical power source arrangement

Memory module

Semiconductor integrated circuit device having hierarchical power source arrangement

Semiconductor integrated circuit device having hierarchical power source arrangement

Semiconductor integrated circuit device with large internal bus width, including memory and logic circuit

Semiconductor integrated circuit device comprising synchronous DRAM core and logic circuit integrated into a single chip and method of testing the synchronous DRAM core

Semiconductor memory device realizing high speed access and low power consumption with redundant circuit

Boosting circuit improved to operate in a wider range of power supply voltage, and a semiconductor memory and a semiconductor integrated circuit device using the same

Content addressable memory device and a method of disabling a coincidence word thereof

Dynamic type semiconductor memory device having reduced peak current during refresh mode and method of operating the same

Test circuit of semiconductor memory device

Method of manufacturing input circuit of semiconductor device

Semiconductor memory device with logic level responsive testing circuit and method therefor

Electric fuse for a redundancy circuit

Semiconductor device for multiple packaging configurations

CMOS reference voltage generator employing separate reference circuits for each output transistor

CMOS dynamic random access memory

Semiconductor memory device capable of block writing in large bus width

Static random access memory device having a single bit line configuration

Semiconductor integrated circuit device having improved stacked capacitor and manufacturing method therefor

Semiconductor device and method of manufacturing the same

Fast memory device allowing suppression of peak value of operational current

Static random access memory device having a single bit line configuration

Static random access memory device having a single bit line configuration

Content addressable semiconductor memory device and operating method therefor

Integrated circuit having superconductive wirings

Substrate bias circuit having substrate bias voltage clamp and operating method therefor

Semiconductor memory

Static type semiconductor device operable at a low voltage with small power consumption

Method of manufacturing semiconductor device

Circuit for prioritizing outputs of an associative memory with parallel inhibition paths and a compact architecture

Dynamic random access memory device with internal refresh

Semiconductor memory device having data transition detecting function

RENESAS TECH CORP

Semiconductor memory module and register buffer device for use in the same

Data bus

Semiconductor integrated circuit device comprising RAM with command decode system and logic circuit integrated into a single chip and testing method of the RAM with command decode system

Dynamic associative memory device

MITSUBISHI DENKI KABUSHIKI DEN

Input circuit of a semiconductor device

RENESAS ELECTRONICS CORP

Semiconductor device

TSUTSUMI TOSHIAKI

Semiconductor device