P

Inventor

YOUNG BRUCE

US52 patents
⚠️ This page may combine multiple inventors who share the name “YOUNG BRUCE”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

INTEL CORP

26 patents
US5696949ADec 9, 1997

System for PCI slots expansion using asynchronous PCI-to-PCI bridge with clock generator for providing clock signal to the expansion mother board and expansion side of bridge

INTEL CORP110 citations99
US5548730AAug 20, 1996

Intelligent bus bridge for input/output subsystems in a computer system

INTEL CORP206 citations99
US5941964AAug 24, 1999

Bridge buffer management by bridge interception of synchronization events

INTEL CORP57 citations95
US5913045AJun 15, 1999

Programmable PCI interrupt routing mechanism

INTEL CORP111 citations95
US5835784ANov 10, 1998

System for booting processor from remote memory by preventing host processor from configuring an environment of processor while configuring an interface unit between processor and remote memory

INTEL CORP44 citations95
US5768548AJun 16, 1998

Bus bridge for responding to received first write command by storing data and for responding to received second write command by transferring the stored data

INTEL CORP82 citations95
US5630094AMay 13, 1997

Integrated bus bridge and memory controller that enables data streaming to a shared memory of a computer system using snoop ahead transactions

INTEL CORP60 citations95
US5613075AMar 18, 1997

Method and apparatus for providing deterministic read access to main memory in a computer system

INTEL CORP100 citations95
US5887194AMar 23, 1999

Locking protocol for peripheral component interconnect utilizing master device maintaining assertion of lock signal after relinquishing control of bus such that slave device remains locked

INTEL CORP44 citations94
US5751975AMay 12, 1998

Method and apparatus for interfacing a device compliant to a first bus protocol to an external bus having a second bus protocol and for providing virtual functions through a multi-function intelligent bridge

INTEL CORP152 citations94
US5467295ANov 14, 1995

Bus arbitration with master unit controlling bus and locking a slave unit that can relinquish bus for other masters while maintaining lock on slave unit

INTEL CORP73 citations94
US6079022AJun 20, 2000

Method and apparatus for dynamically adjusting the clock speed of a bus depending on bus activity

INTEL CORP49 citations93
US5768147AJun 16, 1998

Method and apparatus for determining the voltage requirements of a removable system resource

INTEL CORP21 citations93
US5727217AMar 10, 1998

Circuit and method for emulating the functionality of an advanced programmable interrupt controller

INTEL CORP47 citations93
US5619706AApr 8, 1997

Method and apparatus for switching between interrupt delivery mechanisms within a multi-processor system

INTEL CORP34 citations93
US5559954ASep 24, 1996

Method & apparatus for displaying pixels from a multi-format frame buffer

INTEL CORP119 citations93
US5857090AJan 5, 1999

Input/output subsystem having an integrated advanced programmable interrupt controller for use in a personal computer

INTEL CORP42 citations92
US5761458AJun 2, 1998

Intelligent bus bridge for input/output subsystems in a computer system

INTEL CORP27 citations92
US5717873AFeb 10, 1998

Deadlock avoidance mechanism and method for multiple bus topology

INTEL CORP33 citations92
US5574869ANov 12, 1996

Bus bridge circuit having configuration space enable register for controlling transition between various modes by writing the bridge identifier into CSE register

INTEL CORP28 citations92
US5832241ANov 3, 1998

Data consistency across a bus transactions that impose ordering constraints

INTEL CORP27 citations91
US5771387AJun 23, 1998

Method and apparatus for interrupting a processor by a PCI peripheral across an hierarchy of PCI buses

INTEL CORP87 citations91
US5740376AApr 14, 1998

Signaling protocol for a peripheral component interconnect

INTEL CORP24 citations91
US5954821ASep 21, 1999

System for PCI slots expansion having expansion clock generator providing clock signals wherein propagation delay between the clock generator and each recipient is approximately equal

INTEL CORP6 citations74
US6115796ASep 5, 2000

Integrated bus bridge and memory controller that enables data streaming to a shared memory of a computer system using snoop ahead transactions

INTEL CORP12 citations72
US5572718ANov 5, 1996

Mechanism for dynamically determining and distributing computer system clocks

INTEL CORP17 citations71

VENDROW VLAD

9 patents

RINGCENTRAL INC

7 patents

SHMUNIS VLADIMIR G

2 patents

GATEWAY INC

2 patents

BMR SECURITY PROD CORP

1 patent

DESIGNED METAL CONNECTIONS INC

1 patent

XILINX INC

1 patent

RING CENTRAL INC

1 patent

Showing the top 50 of 52 patents by PatentIndex Score.