Inventor
GEUSKENS BIBICHE M
US9 patents
⚠️ This page may combine multiple inventors who share the name “GEUSKENS BIBICHE M”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
INTEL CORP
4 patentsUS9627039B2Apr 18, 2017
Apparatus for reducing write minimum supply voltage for memory
INTEL CORP2 citations73
US9633716B2Apr 25, 2017
Methods and systems to selectively boost an operating voltage of, and controls to an 8T bit-cell array and/or other logic blocks
INTEL CORP3 citations70
US10984855B2Apr 20, 2021
Methods and systems to selectively boost an operating voltage of, and controls to an 8T bit-cell array and/or other logic blocks
INTEL CORP0 citations59
US10217509B2Feb 26, 2019
Methods and systems to selectively boost an operating voltage of, and controls to an 8T bit-cell array and/or other logic blocks
INTEL CORP0 citations51
KULKARNI JAYDEEP P
3 patentsUS9299395B2Mar 29, 2016
Methods and systems to selectively boost an operating voltage of, and controls to an 8T bit-cell array and/or other logic blocks
KULKARNI JAYDEEP P18 citations91
US9153304B2Oct 6, 2015
Apparatus for reducing write minimum supply voltage for memory
KULKARNI JAYDEEP P10 citations83
US8467263B2Jun 18, 2013
Memory write operation methods and circuits
KULKARNI JAYDEEP P5 citations72