Inventor
MERTEN MATTHEW
US13 patents
⚠️ This page may combine multiple inventors who share the name “MERTEN MATTHEW”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
INTEL CORP
6 patentsUS10409612B2Sep 10, 2019
Apparatus and method for transactional memory and lock elision including an abort instruction to abort speculative execution
INTEL CORP7 citations82
US10331452B2Jun 25, 2019
Tracking mode of a processing device in instruction tracing systems
INTEL CORP1 citations60
US7590784B2Sep 15, 2009
Detecting and resolving locks in a memory unit
INTEL CORP6 citations60
US12189509B2Jan 7, 2025
Processor including monitoring circuitry for virtual counters
INTEL CORP0 citations59
US10409611B2Sep 10, 2019
Apparatus and method for transactional memory and lock elision including abort and end instructions to abort or commit speculative execution
INTEL CORP0 citations50
US10956160B2Mar 23, 2021
Method and apparatus for a multi-level reservation station with instruction recirculation
INTEL CORP0 citations46
MERTEN MATTHEW
3 patentsUS8095932B2Jan 10, 2012
Providing quality of service via thread priority in a hyper-threaded microprocessor
MERTEN MATTHEW6 citations67
US8402253B2Mar 19, 2013
Managing multiple threads in a single pipeline
MERTEN MATTHEW2 citations57
US8504804B2Aug 6, 2013
Managing multiple threads in a single pipeline
MERTEN MATTHEW0 citations46
MARDEN MORRIS
3 patentsUS8521993B2Aug 27, 2013
Providing thread fairness by biasing selection away from a stalling thread using a stall-cycle counter in a hyper-threaded microprocessor
MARDEN MORRIS4 citations59
US8438369B2May 7, 2013
Providing thread fairness by biasing selection away from a stalling thread using a stall-cycle counter in a hyper-threaded microprocessor
MARDEN MORRIS4 citations59
US9524191B2Dec 20, 2016
Apparatus including a stall counter to bias processing element selection, and masks to allocate reservation unit entries to one or more processing elements
MARDEN MORRIS1 citations48