P

Inventor

FISHER TIMOTHY

US40 patents
⚠️ This page may combine multiple inventors who share the name “FISHER TIMOTHY”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

IBM

31 patents
US10453537B1Oct 22, 2019

Techniques for reducing read voltage threshold calibration in non-volatile memory

IBM27 citations93
US11264103B2Mar 1, 2022

Hybrid read voltage calibration in non-volatile random access memory

IBM12 citations86
US11138124B2Oct 5, 2021

Migrating data between block pools in a storage system

IBM10 citations86
US11023150B2Jun 1, 2021

Block mode toggling using hybrid controllers

IBM11 citations86
US10699791B2Jun 30, 2020

Adaptive read voltage threshold calibration in non-volatile memory

IBM17 citations86
US10957407B1Mar 23, 2021

Calculating corrective read voltage offsets in non-volatile random access memory

IBM7 citations84
US10489086B1Nov 26, 2019

Reducing read errors by performing mitigation reads to blocks of non-volatile memory

IBM7 citations82
US11182089B2Nov 23, 2021

Adapting memory block pool sizes using hybrid controllers

IBM2 citations73
US11152059B2Oct 19, 2021

Calibration of open blocks in NAND flash memory

IBM2 citations73
US11120882B2Sep 14, 2021

Error recovery of data in non-volatile memory during read

IBM6 citations73
US11056199B2Jul 6, 2021

Updating corrective read voltage offsets in non-volatile random access memory

IBM3 citations73
US11036415B2Jun 15, 2021

Managing memory block calibration based on priority levels

IBM2 citations73
US11016693B2May 25, 2021

Block health estimation for wear leveling in non-volatile memories

IBM2 citations73
US10977181B2Apr 13, 2021

Data placement in write cache architecture supporting read heat data separation

IBM2 citations73
US10658054B2May 19, 2020

Methods for read threshold voltage shifting in non-volatile memory

IBM4 citations73
US10614881B2Apr 7, 2020

Calibration of open blocks in NAND flash memory

IBM3 citations73
US10552063B2Feb 4, 2020

Background mitigation reads in a non-volatile memory system

IBM5 citations73
US10942808B2Mar 9, 2021

Adaptive data and parity placement using compression ratios of storage devices

IBM3 citations71
US10770155B2Sep 8, 2020

Determining a read apparent voltage infector page and infected page

IBM2 citations70
US10956317B2Mar 23, 2021

Garbage collection in non-volatile memory that fully programs dependent layers in a target block

IBM1 citations63
US11762569B2Sep 19, 2023

Workload based relief valve activation for hybrid controller architectures

IBM1 citations62
US11360903B2Jun 14, 2022

Data placement in write cache architecture supporting read heat data separation

IBM0 citations62
US11302403B2Apr 12, 2022

Calculating corrective read voltage offsets in non-volatile random access memory

IBM0 citations62
US11157379B2Oct 26, 2021

Managing blocks of memory based on block health using hybrid controllers

IBM1 citations62
US11151053B2Oct 19, 2021

Increasing data read and/or write heat tracking resolution in storage devices having cache architecture

IBM0 citations62
US11119855B2Sep 14, 2021

Selectively storing parity data in different types of memory

IBM1 citations62
US10956049B2Mar 23, 2021

Wear-aware block mode conversion in non-volatile memory

IBM1 citations62
US11314595B2Apr 26, 2022

Adaptive data and parity placement using compression ratios of storage devices

IBM0 citations61
US11301170B2Apr 12, 2022

Performing sub-logical page write operations in non-volatile random access memory (NVRAM) using pre-populated read-modify-write (RMW) buffers

IBM0 citations52
US11816046B2Nov 14, 2023

Increased read performance for implementations having multiple interface links

IBM0 citations47
US10656847B2May 19, 2020

Mitigating asymmetric transient errors in non-volatile memory by proactive data relocation

IBM0 citations42

CRITICAL INNOVATIONS LLC

3 patents

BIGELOW GROUP

2 patents

PURDUE RESEARCH FOUNDATION

2 patents

SMART FLOW PTY LTD

1 patent

US GOV AIR FORCE

1 patent