Inventor

FALSTER ROBERT J

IT73 patents

⚠️ This page may combine multiple inventors who share the name “FALSTER ROBERT J”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

FALSTER ROBERT J

MEMC ELECTRONIC MATERIALS

Process for growing defect-free silicon wherein the grown silicon is cooled in a separate chamber

Low defect density silicon and a process for producing low defect density silicon wherein V/G0 is controlled by controlling heat transfer at the melt/solid interface

Non-oxygen precipitating czochralski silicon wafers

Low defect density silicon

Low defect density self-interstitial dominated silicon

Silicon on insulator structure from low defect density single crystal silicon

Process for preparing an ideal oxygen precipitating silicon wafer

Low defect density, ideal oxygen precipitating silicon

Process for the preparation of an ideal oxygen precipitating silicon wafer capable of forming an enhanced denuded zone

Process for the preparation of an ideal oxygen precipitating silicon wafer having an asymmetrical vacancy concentration profile capable of forming an enhanced denuded zone

Silicon on insulator structure having a low defect density handler wafer and process for the preparation thereof

Process for controlling thermal history of Czochralski-grown silicon

Control of oxygen precipitate formation in high resistivity CZ silicon

Process for preparing low defect density silicon using high growth rates

Method for revealing agglomerated intrinsic point defects in semiconductor crystals

Low defect density epitaxial wafer and a process for the preparation thereof

Thermally annealed, low defect density single crystal silicon

Process for detecting agglomerated intrinsic point defects by metal decoration

Vacancy dominated, defect-free silicon

Thermally annealed wafers having improved internal gettering

Process for growth of defect free silicon crystals of arbitrarily large diameters

Process for preparing defect free silicon crystals which allows for variability in process conditions

Epitaxial silicon wafers substantially free of grown-in defects

Arsenic and phosphorus doped silicon wafer substrates having intrinsic gettering

Method for controlling of thermal donor formation in high resistivity CZ silicon

Process for producing silicon on insulator structure having intrinsic gettering by ion implantation

Device layer of a silicon-on-insulator structure having vacancy dominated and substantially free of agglomerated vacancy-type defects

Non-uniform minority carrier lifetime distributions in high performance silicon power devices

Arsenic and phosphorus doped silicon wafer substrates having intrinsic gettering

Low defect density regions of self-interstitial dominated silicon

Process for the preparation of non-oxygen precipitating Czochralski silicon wafers

High resistivity silicon structure and a process for the preparation thereof

Process for reclaiming semiconductor wafers and reclaimed wafers

Silicon on insulator structure having an epitaxial layer and intrinsic gettering

Process for forming low defect density, ideal oxygen precipitating silicon

Single crystal silicon wafer having an epitaxial layer substantially free from grown-in defects

Process for producing low defect density, ideal oxygen precipitating silicon

Ideal oxygen precipitating silicon wafers and oxygen out-diffusion-less process therefor

Vacancy, dominsated, defect-free silicon

Thermal annealing process for producing low defect density single crystal silicon

Epitaxial wafer substantially free of grown-in defects

Process for growing silicon crystals which allows for variability in the process conditions while suppressing the formation of agglomerated intrinsic point defects

GLOBALWAFERS CO LTD

Apparatus for stressing semiconductor substrates

High resistivity single crystal silicon ingot and wafer having improved mechanical strength

Apparatus for stressing semiconductor substrates

SUNEDISON SEMICONDUCTOR LTD (UEN201334164H)

Processes and apparatus for preparing heterostructures with reduced strain by radial compression

Processes and apparatus for preparing heterostructures with reduced strain by radial distension

MEMC ELECTRONIC MATERIALS SPA

Ideal oxygen precipitating epitaxial silicon wafers and oxygen out-diffusion-less process therefor

SUNEDISON SEMICONDUCTOR LTD UEN201334164H

Apparatus for stressing semiconductor substrates

MEMC ELECTRONICS MATERIALS INC

Process for producing thermally annealed wafers having improved internal gettering