P

Inventor

IOANNOU NIKOLAS

CH125 patents

Patents

50 patents
US10013169B2Jul 3, 2018

Cooperative data deduplication in a solid state storage array

IBM57 citations98
US9251909B1Feb 2, 2016

Background threshold voltage shifting using base and delta threshold voltage shift values in flash memory

IBM48 citations98
US10437670B1Oct 8, 2019

Metadata hardening and parity accumulation for log-structured arrays

IBM66 citations96
US10170195B1Jan 1, 2019

Threshold voltage shifting at a lower bit error rate by intelligently performing dummy configuration reads

IBM37 citations94
US10101931B1Oct 16, 2018

Mitigating read errors following programming in a multi-level non-volatile memory

IBM50 citations94
US9575681B1Feb 21, 2017

Data deduplication with reduced hash computations

IBM22 citations94
US9569306B1Feb 14, 2017

Recovery of multi-page failures in non-volatile memory system

IBM23 citations94
US10884914B2Jan 5, 2021

Regrouping data during relocation to facilitate write amplification reduction

IBM35 citations93
US10453537B1Oct 22, 2019

Techniques for reducing read voltage threshold calibration in non-volatile memory

IBM27 citations93
US11264103B2Mar 1, 2022

Hybrid read voltage calibration in non-volatile random access memory

IBM12 citations86
US11176036B2Nov 16, 2021

Endurance enhancement scheme using memory re-evaluation

IBM10 citations86
US11138124B2Oct 5, 2021

Migrating data between block pools in a storage system

IBM10 citations86
US11023150B2Jun 1, 2021

Block mode toggling using hybrid controllers

IBM11 citations86
US10963327B2Mar 30, 2021

Detecting error count deviations for non-volatile memory blocks for advanced non-volatile memory block management

IBM10 citations86
US10699791B2Jun 30, 2020

Adaptive read voltage threshold calibration in non-volatile memory

IBM17 citations86
US10957407B1Mar 23, 2021

Calculating corrective read voltage offsets in non-volatile random access memory

IBM7 citations84
US9864523B2Jan 9, 2018

Background threshold voltage shifting using base and delta threshold voltage shift values in non-volatile memory

IBM5 citations84
US9857986B2Jan 2, 2018

Wear leveling of a memory array

IBM7 citations84
US9779021B2Oct 3, 2017

Non-volatile memory controller cache architecture with support for separation of data streams

IBM8 citations84
US9710199B2Jul 18, 2017

Non-volatile memory data storage with low read amplification

IBM7 citations84
US9632927B2Apr 25, 2017

Reducing write amplification in solid-state drives by separating allocation of relocate writes from user writes

IBM5 citations84
US9583205B2Feb 28, 2017

Background threshold voltage shifting using base and delta threshold voltage shift values in non-volatile memory

IBM7 citations84
US9563373B2Feb 7, 2017

Detecting error count deviations for non-volatile memory blocks for advanced non-volatile memory block management

IBM9 citations84
US9417809B1Aug 16, 2016

Efficient management of page retirement in non-volatile memory utilizing page retirement classes

IBM10 citations84
US9389792B1Jul 12, 2016

Reducing read-after-write errors in a non-volatile memory system using an old data copy

IBM14 citations84
US9690801B1Jun 27, 2017

Techniques for improving deduplication efficiency in a storage system with multiple storage nodes

IBM9 citations83
US9740609B1Aug 22, 2017

Garbage collection techniques for a data storage system

IBM7 citations82
US11656792B2May 23, 2023

Mirroring data in write caches of a controller of a non-volatile memory

IBM4 citations75
US12093171B2Sep 17, 2024

Proactive data placement in high density storage by a hybrid non-volatile storage controller

IBM2 citations73
US11797199B2Oct 24, 2023

Balancing utilization of memory pools of physical blocks of differing storage densities

IBM2 citations73
US11182089B2Nov 23, 2021

Adapting memory block pool sizes using hybrid controllers

IBM2 citations73
US11152059B2Oct 19, 2021

Calibration of open blocks in NAND flash memory

IBM2 citations73
US11120882B2Sep 14, 2021

Error recovery of data in non-volatile memory during read

IBM6 citations73
US11056199B2Jul 6, 2021

Updating corrective read voltage offsets in non-volatile random access memory

IBM3 citations73
US11036415B2Jun 15, 2021

Managing memory block calibration based on priority levels

IBM2 citations73
US11016693B2May 25, 2021

Block health estimation for wear leveling in non-volatile memories

IBM2 citations73
US10977181B2Apr 13, 2021

Data placement in write cache architecture supporting read heat data separation

IBM2 citations73
US10942662B2Mar 9, 2021

Relocating and/or re-programming blocks of storage space based on calibration frequency and resource utilization

IBM2 citations73
US10824352B2Nov 3, 2020

Reducing unnecessary calibration of a memory unit for which the error count margin has been exceeded

IBM3 citations73
US10658054B2May 19, 2020

Methods for read threshold voltage shifting in non-volatile memory

IBM4 citations73
US10614881B2Apr 7, 2020

Calibration of open blocks in NAND flash memory

IBM3 citations73
US10592110B2Mar 17, 2020

Techniques for dynamically adjusting over-provisioning space of a flash controller based on workload characteristics

IBM3 citations73
US10552063B2Feb 4, 2020

Background mitigation reads in a non-volatile memory system

IBM5 citations73
US10459839B1Oct 29, 2019

Accelerating garbage collection of flushed logical erase blocks in non-volatile memory

IBM6 citations73
US10387317B2Aug 20, 2019

Non-volatile memory controller cache architecture with support for separation of data streams

IBM2 citations73
US10372519B2Aug 6, 2019

Detecting error count deviations for non-volatile memory blocks for advanced non-volatile memory block management

IBM1 citations73
US10365859B2Jul 30, 2019

Storage array management employing a merged background management process

IBM3 citations73
US10222998B2Mar 5, 2019

Background threshold voltage shifting using base and delta threshold voltage shift values in non-volatile memory

IBM1 citations73
US10222997B2Mar 5, 2019

Background threshold voltage shifting using base and delta threshold voltage shift values in non-volatile memory

IBM3 citations73
US10082962B2Sep 25, 2018

Wear leveling of a memory array

IBM4 citations73

Showing the top 50 of 125 patents by PatentIndex Score.