Inventor

TEH YOUNG-WAY

SG25 patents

⚠️ This page may combine multiple inventors who share the name “TEH YOUNG-WAY”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

TEH YOUNG-WAY

CHARTERED SEMICONDUCTOR MFG

Integrated circuit system for suppressing short channel effects

Method for fabricating an air gap shallow trench isolation (STI) structure

Method for fabricating an air gap metallization scheme that reduces inter-metal capacitance of interconnect structures

Method to remove spacer after salicidation to enhance contact etch stop liner stress on MOS

Copper metal structure for the reduction of intra-metal capacitance

Copper metal structure for the reduction of intra-metal capacitance

Composite stress spacer

Spacer-less low-k dielectric processes

IBM

Methods of forming semiconductor devices using embedded L-shape spacers

Method and apparatus for post silicide spacer removal

Dual stress memory technique method and related structure

Method for improved fabrication of a semiconductor using a stress proximity technique process

GLOBALFOUNDRIES SG PTE LTD

Method to remove spacer after salicidation to enhance contact etch stop liner stress on MOS

Poly profile engineering to modulate spacer induced stress for device enhancement

Flash memory devices with thickened source/drain silicide

SAMSUNG ELECTRONICS CO LTD

Methods of fabricating semiconductor devices having a dual stress liner

Differential mechanical stress-producing regions for integrated circuit field effect transistors

FREESCALE SEMICONDUCTOR INC

Method for transistor fabrication with optimized performance

LEE YONG MENG

Spacer-less low-K dielectric processes

LI WEIPENG

Integrated circuit structure having substantially planar N-P step height and methods of forming

CHEN XIANGDONG

Balancing NFET and PFET performance using straining layers

LIU YANXIANG

Semiconductor device with an oversized local contact as a Faraday shield

HO VINCENT

Poly profile engineering to modulate spacer induced stress for device enhancement

AJMERA ATUL C

Spacer and process to enhance the strain in the channel with stress liner

TEH YOUNG WAY

High-K metal gate device