Inventor
SIVERO STEFANO
IT36 patents
⚠️ This page may combine multiple inventors who share the name “SIVERO STEFANO”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
ATMEL CORP
19 patentsUS6724241B1Apr 20, 2004
Variable charge pump circuit with dynamic load
ATMEL CORP90 citations98
US7579902B2Aug 25, 2009
Charge pump for generation of multiple output-voltage levels
ATMEL CORP42 citations92
US7436232B2Oct 14, 2008
Regenerative clock repeater
ATMEL CORP31 citations92
US7417904B2Aug 26, 2008
Adaptive gate voltage regulation
ATMEL CORP35 citations92
US7049880B2May 23, 2006
High precision digital-to-analog converter with optimized power consumption
ATMEL CORP17 citations92
US6906576B2Jun 14, 2005
High precision digital-to-analog converter with optimized power consumption
ATMEL CORP23 citations92
US6828834B2Dec 7, 2004
Power-on management for voltage down-converter
ATMEL CORP19 citations92
US6794927B2Sep 21, 2004
Modular charge pump architecture
ATMEL CORP33 citations92
US6734701B2May 11, 2004
Fast controlled output buffer
ATMEL CORP14 citations84
US7599231B2Oct 6, 2009
Adaptive regulator for idle state in a charge pump circuit of a memory device
ATMEL CORP14 citations83
US6771200B2Aug 3, 2004
DAC-based voltage regulator for flash memory array
ATMEL CORP14 citations83
US7456678B2Nov 25, 2008
Apparatus and method for providing a temperature compensated reference current
ATMEL CORP14 citations82
US7983098B2Jul 19, 2011
Adaptive regulator for idle state in a charge pump circuit of a memory device
ATMEL CORP5 citations73
US6785183B2Aug 31, 2004
System for controlling the stand-by to active and active to stand-by transitions of a VCC regulator for a flash memory device
ATMEL CORP8 citations72
US7769943B2Aug 3, 2010
Flexible, low cost apparatus and method to introduce and check algorithm modifications in a non-volatile memory
ATMEL CORP2 citations62
US7505326B2Mar 17, 2009
Programming pulse generator
ATMEL CORP4 citations61
US7176750B2Feb 13, 2007
Method and apparatus for fast power-on of the band-gap reference
ATMEL CORP5 citations60
US7333389B2Feb 19, 2008
Column decoding architecture for flash memories
ATMEL CORP0 citations51
US7430150B2Sep 30, 2008
Method and system for providing sensing circuitry in a multi-bank memory device
ATMEL CORP0 citations41
FERROELECTRIC MEMORY GMBH
10 patentsUS11443792B1Sep 13, 2022
Memory cell, memory cell arrangement, and methods thereof
FERROELECTRIC MEMORY GMBH14 citations85
US12518813B2Jan 6, 2026
Sense counter-pulse for reading state-programmable memory cells
FERROELECTRIC MEMORY GMBH0 citations62
US12283346B2Apr 22, 2025
Locally embedded bad sector marking for a memory
FERROELECTRIC MEMORY GMBH0 citations62
US12283300B2Apr 22, 2025
Devices, methods, and systems for a multilevel memory cell
FERROELECTRIC MEMORY GMBH0 citations62
US12431178B2Sep 30, 2025
Low-voltage sense amplifier for reading a state-programmable memory element
FERROELECTRIC MEMORY GMBH0 citations58
US12592268B2Mar 31, 2026
Devices, methods, and systems for calibrating a read voltage used for reading memory cells
FERROELECTRIC MEMORY GMBH0 citations56
US12032398B2Jul 9, 2024
Regulator circuit and methods thereof
FERROELECTRIC MEMORY GMBH0 citations53
US12562723B2Feb 24, 2026
Programmable delays and methods thereof
FERROELECTRIC MEMORY GMBH0 citations52
US12360741B2Jul 15, 2025
Multiply operation circuit, multiply and accumulate circuit, and methods thereof
FERROELECTRIC MEMORY GMBH0 citations52
US12462861B2Nov 4, 2025
Devices, methods, and systems for calibrating a sensing capacitor used in a sensing circuit for reading memory cells
FERROELECTRIC MEMORY GMBH0 citations45