P

Inventor

YOUNG STEVEN P

US214 patents

Patents

50 patents
US7965102B1Jun 21, 2011

Formation of columnar application specific circuitry using a columnar programmable device

XILINX INC188 citations99
US6777978B2Aug 17, 2004

Structures and methods for selectively applying a well bias to portions of a programmable device

XILINX INC125 citations99
US6573749B2Jun 3, 2003

Method and apparatus for incorporating a multiplier into an FPGA

XILINX INC156 citations99
US6529040B1Mar 4, 2003

FPGA lookup table with speed read decoder

XILINX INC241 citations99
US6526557B1Feb 25, 2003

Architecture and method for partially reconfiguring an FPGA

XILINX INC196 citations99
US6448808B2Sep 10, 2002

Interconnect structure for a programmable logic device

XILINX INC225 citations99
US6362650B1Mar 26, 2002

Method and apparatus for incorporating a multiplier into an FPGA

XILINX INC210 citations99
US5933023AAug 3, 1999

FPGA architecture having RAM blocks with programmable word length and width and dedicated address and data lines

XILINX INC262 citations99
US5920202AJul 6, 1999

Configurable logic element with ability to evaluate five and six input functions

XILINX INC121 citations99
US5914616AJun 22, 1999

FPGA repeatable interconnect structure with hierarchical interconnect lines

XILINX INC495 citations99
US7919845B2Apr 5, 2011

Formation of a hybrid integrated circuit device

XILINX INC188 citations98
US7567997B2Jul 28, 2009

Applications of cascading DSP slices

XILINX INC71 citations98
US7499513B1Mar 3, 2009

Method and apparatus for providing frequency synthesis and phase alignment in an integrated circuit

XILINX INC83 citations98
US7480690B2Jan 20, 2009

Arithmetic circuit with multiplexed addend inputs

XILINX INC61 citations98
US7472155B2Dec 30, 2008

Programmable logic device with cascading DSP slices

XILINX INC111 citations98
US7276934B1Oct 2, 2007

Integrated circuit with programmable routing structure including diagonal interconnect lines

XILINX INC66 citations98
US7218139B1May 15, 2007

Programmable integrated circuit providing efficient implementations of arithmetic functions

XILINX INC68 citations98
US7193433B1Mar 20, 2007

Programmable logic block having lookup table with partial output signal driving carry multiplexer

XILINX INC121 citations98
US7068072B2Jun 27, 2006

Integrated circuit with interface tile for coupling to a stacked-die second integrated circuit

XILINX INC312 citations98
US6621325B2Sep 16, 2003

Structures and methods for selectively applying a well bias to portions of a programmable device

XILINX INC90 citations98
US6522167B1Feb 18, 2003

User configurable on-chip memory system

XILINX INC93 citations98
US6396303B1May 28, 2002

Expandable interconnect structure for FPGAS

XILINX INC109 citations98
US6373779B1Apr 16, 2002

Block RAM having multiple configurable write modes for use in a field programmable gate array

XILINX INC91 citations98
US6255848B1Jul 3, 2001

Method and structure for reading, modifying and writing selected configuration memory cells of an FPGA

XILINX INC98 citations98
US6219305B1Apr 17, 2001

Method and system for measuring signal propagation delays using ring oscillators

XILINX INC91 citations98
US6204695B1Mar 20, 2001

Clock-gating circuit for reducing power consumption

XILINX INC122 citations98
US6201406B1Mar 13, 2001

FPGA configurable by two types of bitstreams

XILINX INC87 citations98
US6107826AAug 22, 2000

Interconnect structure for FPGA with configurable delay locked loop

XILINX INC94 citations98
US5963050AOct 5, 1999

Configurable logic element with fast feedback paths

XILINX INC129 citations98
US5942913AAug 24, 1999

FPGA repeatable interconnect structure with bidirectional and unidirectional interconnect lines

XILINX INC91 citations98
US5936424AAug 10, 1999

High speed bus with tree structure for selecting bus driver

XILINX INC128 citations98
US5844844ADec 1, 1998

FPGA memory element programmably triggered on both clock edges

XILINX INC99 citations98
US6975145B1Dec 13, 2005

Glitchless dynamic multiplexer with synchronous and asynchronous controls

XILINX INC69 citations97
US6204689B1Mar 20, 2001

Input/output interconnect circuit for FPGAs

XILINX INC115 citations97
US7218143B1May 15, 2007

Integrated circuit having fast interconnect paths between memory elements and carry logic

XILINX INC55 citations96
US7061271B1Jun 13, 2006

Six-input look-up table for use in a field programmable gate array

XILINX INC58 citations96
US7057413B1Jun 6, 2006

Large crossbar switch implemented in FPGA

XILINX INC65 citations96
US6768338B1Jul 27, 2004

PLD lookup table including transistors of more than one oxide thickness

XILINX INC62 citations96
US6759869B1Jul 6, 2004

Large crossbar switch implemented in FPGA

XILINX INC83 citations96
US6525565B2Feb 25, 2003

Double data rate flip-flop

XILINX INC43 citations96
US6427156B1Jul 30, 2002

Configurable logic block with AND gate for efficient multiplication in FPGAS

XILINX INC106 citations96
US6323682B1Nov 27, 2001

FPGA architecture with wide function multiplexers

XILINX INC53 citations96
US6294930B1Sep 25, 2001

FPGA with a plurality of input reference voltage levels

XILINX INC31 citations96
US6292022B2Sep 18, 2001

Interconnect structure for a programmable logic device

XILINX INC31 citations96
US6288568B1Sep 11, 2001

FPGA architecture with deep look-up table RAMs

XILINX INC57 citations96
US6204690B1Mar 20, 2001

FPGA architecture with offset interconnect lines

XILINX INC45 citations96
US6154048ANov 28, 2000

Structure and method for loading narrow frames of data from a wide input bus

XILINX INC73 citations96
US6144220ANov 7, 2000

FPGA Architecture using multiplexers that incorporate a logic gate

XILINX INC56 citations96
US6137307AOct 24, 2000

Structure and method for loading wide frames of data from a narrow input bus

XILINX INC71 citations96
US6107827AAug 22, 2000

FPGA CLE with two independent carry chains

XILINX INC59 citations96

Showing the top 50 of 214 patents by PatentIndex Score.