Inventor
SCHULTZ DAVID P
US69 patents
⚠️ This page may combine multiple inventors who share the name “SCHULTZ DAVID P”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
XILINX INC
43 patentsUS7126372B2Oct 24, 2006
Reconfiguration port for dynamic reconfiguration—sub-frame access for reconfiguration
XILINX INC151 citations99
US6204687B1Mar 20, 2001
Method and structure for configuring FPGAS
XILINX INC336 citations99
US6191614B1Feb 20, 2001
FPGA configuration circuit including bus-based CRC register
XILINX INC245 citations99
US9722613B1Aug 1, 2017
Circuit arrangement for and a method of enabling a partial reconfiguration of a circuit implemented in an integrated circuit device
XILINX INC58 citations98
US7218137B2May 15, 2007
Reconfiguration port for dynamic reconfiguration
XILINX INC100 citations98
US6429682B1Aug 6, 2002
Configuration bus interface circuit for FPGAs
XILINX INC83 citations98
US6262596B1Jul 17, 2001
Configuration bus interface circuit for FPGAS
XILINX INC116 citations98
US6255848B1Jul 3, 2001
Method and structure for reading, modifying and writing selected configuration memory cells of an FPGA
XILINX INC98 citations98
US6005423ADec 21, 1999
Low current power-on reset circuit
XILINX INC94 citations98
US6445245B1Sep 3, 2002
Digitally controlled impedance for I/O of an integrated circuit device
XILINX INC116 citations97
US6507211B1Jan 14, 2003
Programmable logic device capable of preserving user data during partial or complete reconfiguration
XILINX INC52 citations96
US6489837B2Dec 3, 2002
Digitally controlled impedance for I/O of an integrated circuit device
XILINX INC62 citations96
US6366128B1Apr 2, 2002
Circuit for producing low-voltage differential signals
XILINX INC74 citations96
US6069489AMay 30, 2000
FPGA having fast configuration memory data readback
XILINX INC80 citations96
US7102555B2Sep 5, 2006
Boundary-scan circuit used for analog and digital testing of an integrated circuit
XILINX INC60 citations95
US6353334B1Mar 5, 2002
Circuit for converting a logic signal on an output node to a pair of low-voltage differential signals
XILINX INC69 citations94
US7111217B1Sep 19, 2006
Method and system for flexibly nesting JTAG TAP controllers for FPGA-based system-on-chip (SoC)
XILINX INC34 citations93
US6781407B2Aug 24, 2004
FPGA and embedded circuitry initialization and processing
XILINX INC53 citations93
US7882165B2Feb 1, 2011
Digital signal processing element having an arithmetic logic unit
XILINX INC25 citations92
US7426678B1Sep 16, 2008
Error checking parity and syndrome of a block of data with relocated parity bits
XILINX INC21 citations92
US7420392B2Sep 2, 2008
Programmable gate array and embedded circuitry initialization and processing
XILINX INC35 citations92
US7283409B1Oct 16, 2007
Data monitoring for single event upset in a programmable logic device
XILINX INC22 citations92
US7233532B2Jun 19, 2007
Reconfiguration port for dynamic reconfiguration-system monitor interface
XILINX INC26 citations92
US6525562B1Feb 25, 2003
Programmable logic device capable of preserving state data during partial or complete reconfiguration
XILINX INC38 citations92
US6191613B1Feb 20, 2001
Programmable logic device with delay-locked loop
XILINX INC37 citations92
US6034557AMar 7, 2000
Delay circuit with temperature and voltage stability
XILINX INC22 citations92
US5617021AApr 1, 1997
High speed post-programming net verification method
XILINX INC19 citations88
US7840630B2Nov 23, 2010
Arithmetic logic unit circuit
XILINX INC17 citations84
US7529993B1May 5, 2009
Method of selectively programming integrated circuits to compensate for process variations and/or mask revisions
XILINX INC9 citations84
US7368940B1May 6, 2008
Programmable integrated circuit with selective programming to compensate for process variations and/or mask revisions
XILINX INC15 citations84
US7314174B1Jan 1, 2008
Method and system for configuring an integrated circuit
XILINX INC14 citations84
US7196940B1Mar 27, 2007
Method and apparatus for a multiplexed address line driver
XILINX INC14 citations84
US7109750B2Sep 19, 2006
Reconfiguration port for dynamic reconfiguration-controller
XILINX INC17 citations84
US6097210AAug 1, 2000
Multiplexer array with shifted input traces
XILINX INC16 citations84
US10505548B1Dec 10, 2019
Multi-chip structure having configurable network-on-chip
XILINX INC12 citations83
US6526466B1Feb 25, 2003
Method and system for PLD swapping
XILINX INC13 citations82
US5694047ADec 2, 1997
Method and system for measuring antifuse resistance
XILINX INC18 citations82
US10680615B1Jun 9, 2020
Circuit for and method of configuring and partially reconfiguring function blocks of an integrated circuit device
XILINX INC9 citations79
US7895509B1Feb 22, 2011
Error checking parity and syndrome of a block of data with relocated parity bits
XILINX INC4 citations74
US7286382B1Oct 23, 2007
Segmented dataline scheme in a memory with enhanced full fault coverage memory cell testability
XILINX INC7 citations74
US7142442B1Nov 28, 2006
Segmented dataline scheme in a memory with enhanced full fault coverage memory cell testability
XILINX INC9 citations74
US6323681B1Nov 27, 2001
Circuits and methods for operating a multiplexer array
XILINX INC6 citations74
US5399924AMar 21, 1995
Low current optional inverter
XILINX INC10 citations74
BELL HELICOPTER TEXTRON INC
3 patentsSCHULTZ DAVID P
2 patentsCORY WARREN E
1 patentDICKMAN COREY J
1 patentShowing the top 50 of 69 patents by PatentIndex Score.