Inventor · disambiguated record
Erwin Pfeffer
Also filed as: PFEFFER ERWIN · PFEFFER ERWIN F
55 granted patents·2 pending applications·1,091 citations·filing 1983–2019
99Inventor score
Top patents by PatentIndex Score
57 records- 0198US7197601B2Method, system and program product for invalidating a range of selected storage translation table entriesIBM·Filed 2005·Granted Mar 27, 2007·81 cites·57 claims
- 0295US7284100B2Invalidating storage, clearing buffer entries, and an instruction thereforIBM·Filed 2003·Granted Oct 16, 2007·74 cites·72 claims
- 0395US5761734AToken-based serialisation of instructions in a multiprocessor systemIBM·Filed 1996·Granted Jun 2, 1998·272 cites·24 claims
- 0494US10241910B2Creating a dynamic address translation with translation exception qualifiersIBM·Filed 2017·Granted Mar 26, 2019·8 cites·20 claims
- 0594US8452942B2Invalidating a range of two or more translation table entries and instruction thereforeSLEGEL TIMOTHY J·Filed 2012·Granted May 28, 2013·22 cites·20 claims
- 0694US8103851B2Dynamic address translation with translation table entry format control for indentifying format of the translation table entryGREINER DAN F·Filed 2008·Granted Jan 24, 2012·30 cites·27 claims
- 0793US8041923B2Load page table entry address instruction execution based on an address translation format control fieldIBM·Filed 2008·Granted Oct 18, 2011·25 cites·24 claims
- 0892US10078585B2Creating a dynamic address translation with translation exception qualifiersIBM·Filed 2015·Granted Sep 18, 2018·6 cites·20 claims
- 0992US8117417B2Dynamic address translation with change record overrideGREINER DAN F·Filed 2008·Granted Feb 14, 2012·21 cites·21 claims
- 1092US6418522B1Translation lookaside buffer for virtual memory systemsIBM·Filed 2000·Granted Jul 9, 2002·81 cites·8 claims
- 1191US9092351B2Creating a dynamic address translation with translation exception qualifierIBM·Filed 2014·Granted Jul 28, 2015·9 cites·16 claims
- 1289US7281115B2Method, system and program product for clearing selected storage translation buffer entriesIBM·Filed 2005·Granted Oct 9, 2007·14 cites·9 claims
- 1389US6996698B2Blocking processing restrictions based on addressesIBM·Filed 2003·Granted Feb 7, 2006·51 cites·44 claims
- 1488US8166239B2Translation lookaside buffer and related method and program product utilized for virtual addressesFERTIG MATTHIAS·Filed 2008·Granted Apr 24, 2012·23 cites·20 claims
- 1588US8151085B2Method for address translation in virtual machinesDEUTSCHLE JOERG·Filed 2009·Granted Apr 3, 2012·21 cites·12 claims
- 1686US9934159B2Dynamic address translation with fetch protection in an emulated environmentIBM·Filed 2016·Granted Apr 3, 2018·3 cites·12 claims
- 1786US8037278B2Dynamic address translation with format controlIBM·Filed 2008·Granted Oct 11, 2011·15 cites·24 claims
- 1885US8930673B2Load page table entry address instruction execution based on an address translation format control fieldGREINER DAN F·Filed 2013·Granted Jan 6, 2015·6 cites·20 claims
- 1985US4570180AMethod for automatic optical inspectionIBM·Filed 1983·Granted Feb 11, 1986·101 cites·7 claims
- 2084US8631216B2Dynamic address translation with change record overrideGREINER DAN F·Filed 2012·Granted Jan 14, 2014·6 cites·15 claims
- 2184US8621180B2Dynamic address translation with translation table entry format control for identifying format of the translation table entryGREINER DAN F·Filed 2011·Granted Dec 31, 2013·6 cites·20 claims
- 2283US8683176B2Dynamic address translation with translation exception qualifierGREINER DAN F·Filed 2011·Granted Mar 25, 2014·4 cites·23 claims
- 2382US9454490B2Invalidating a range of two or more translation table entries and instruction thereforeIBM·Filed 2013·Granted Sep 27, 2016·5 cites·20 claims
- 2482US8019964B2Dynamic address translation with DAT protectionINTERNAT BUISNESS MACHINES CORP·Filed 2008·Granted Sep 13, 2011·14 cites·25 claims
- 2580US11074180B2Creating a dynamic address translation with translation exception qualifiersIBM·Filed 2019·Granted Jul 27, 2021·1 cites·20 claims
- 2680US8095773B2Dynamic address translation with translation exception qualifierGREINER DAN F·Filed 2008·Granted Jan 10, 2012·6 cites·27 claims
- 2780US8041922B2Enhanced dynamic address translation with load real address functionIBM·Filed 2008·Granted Oct 18, 2011·10 cites·16 claims
- 2879US7020761B2Blocking processing restrictions based on page indicesIBM·Filed 2003·Granted Mar 28, 2006·26 cites·59 claims
- 2978US8122224B2Clearing selected storage translation buffer entries bases on table origin addressSLEGEL TIMOTHY J·Filed 2011·Granted Feb 21, 2012·3 cites·18 claims
- 3077US9244856B2Dynamic address translation with translation table entry format control for identifying format of the translation table entryIBM·Filed 2013·Granted Jan 26, 2016·3 cites·20 claims
- 3175US8862834B2Shared memory translation facilityIBM·Filed 2013·Granted Oct 14, 2014·3 cites·17 claims
- 3274US7530067B2Filtering processor requests based on identifiersIBM·Filed 2003·Granted May 5, 2009·17 cites·11 claims
- 3373US6766434B2Method for sharing a translation lookaside buffer between CPUsIBM·Filed 2002·Granted Jul 20, 2004·18 cites·13 claims
- 3471US9804970B2Invalidating a range of two or more translation table entries and instruction thereforIBM·Filed 2016·Granted Oct 31, 2017·1 cites·20 claims
- 3571US8082405B2Dynamic address translation with fetch protectionGREINER DAN F·Filed 2008·Granted Dec 20, 2011·5 cites·28 claims
- 3668US7890731B2Clearing selected storage translation buffer entries based on table origin addressIBM·Filed 2007·Granted Feb 15, 2011·2 cites·21 claims
- 3767US10977190B2Dynamic address translation with access control in an emulator environmentIBM·Filed 2019·Granted Apr 13, 2021·0 cites·10 claims
- 3863US7975182B2Method, system and computer program product for generating trace dataIBM·Filed 2008·Granted Jul 5, 2011·3 cites·16 claims
- 3963US7401185B2Buffered indexing to manage hierarchical tablesIBM·Filed 2006·Granted Jul 15, 2008·2 cites·20 claims
- 4062US10423539B2Dynamic address translation with access control in an emulator environmentIBM·Filed 2017·Granted Sep 24, 2019·0 cites·20 claims
- 4159US8234642B2Filtering processor requests based on identifiersSLEGEL TIMOTHY J·Filed 2009·Granted Jul 31, 2012·1 cites·23 claims
- 4258US9021225B2Dynamic address translation with fetch protection in an emulated environmentIBM·Filed 2013·Granted Apr 28, 2015·0 cites·12 claims
- 4357US9003134B2Emulation of a dynamic address translation with change record override on a machine of another architectureIBM·Filed 2013·Granted Apr 7, 2015·0 cites·15 claims
- 4457US7930514B2Method, system, and computer program product for implementing a dual-addressable cacheIBM·Filed 2005·Granted Apr 19, 2011·1 cites·20 claims
- 4556US9378128B2Dynamic address translation with fetch protection in an emulated environmentIBM·Filed 2015·Granted Jun 28, 2016·0 cites·12 claims
- 4654US8677098B2Dynamic address translation with fetch protectionGREINER DAN F·Filed 2008·Granted Mar 18, 2014·0 cites·28 claims
- 4754US5996063AManagement of both renamed and architected registers in a superscalar computer systemIBM·Filed 1997·Granted Nov 30, 1999·28 cites·13 claims
- 4853US8639911B2Load page table entry address instruction execution based on an address translation format control fieldGREINER DAN F·Filed 2011·Granted Jan 28, 2014·0 cites·20 claims
- 4953US8527715B2Providing a shared memory translation facilityGREINER DAN F·Filed 2008·Granted Sep 3, 2013·0 cites·17 claims
- 5052US6108771ARegister renaming with a pool of physical registersIBM·Filed 1998·Granted Aug 22, 2000·26 cites·7 claims
Showing the top 50 of 57 patent records by PatentIndex Score.
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