Inventor
HARNEY KEVIN
US22 patents
⚠️ This page may combine multiple inventors who share the name “HARNEY KEVIN”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
INTEL CORP
16 patentsUS5522080AMay 28, 1996
Centralized control SIMD processor having different priority levels set for each data transfer request type and successively repeating the servicing of data transfer request in a predetermined order
INTEL CORP105 citations98
US5335321AAug 2, 1994
Scalable multimedia platform architecture
INTEL CORP113 citations98
US5640528AJun 17, 1997
Method and apparatus for translating addresses using mask and replacement value registers
INTEL CORP93 citations96
US5430854AJul 4, 1995
Simd with selective idling of individual processors based on stored conditional flags, and with consensus among all flags used for conditional branching
INTEL CORP60 citations95
US5189636AFeb 23, 1993
Dual mode combining circuitry
INTEL CORP76 citations95
US5047975ASep 10, 1991
Dual mode adder circuitry with overflow detection and substitution enabled for a particular mode
INTEL CORP86 citations95
US5361370ANov 1, 1994
Single-instruction multiple-data processor having dual-ported local memory architecture for simultaneous data transmission on local memory ports and global port
INTEL CORP67 citations94
US5592399AJan 7, 1997
Pipelined video encoder architecture
INTEL CORP33 citations93
US5684534ANov 4, 1997
Task-splitting dual-processor system for motion estimation processing
INTEL CORP60 citations90
US5649142AJul 15, 1997
Method and apparatus for translating addresses using mask and replacement value registers and for accessing a service routine in response to a page fault
INTEL CORP30 citations89
US5446839AAug 29, 1995
Method for controlling dataflow between a plurality of circular buffers
INTEL CORP51 citations88
US5548793AAug 20, 1996
System for controlling arbitration using the memory request signal types generated by the plurality of datapaths
INTEL CORP17 citations81
US5530884AJun 25, 1996
System with plurality of datapaths having dual-ported local memory architecture for converting prefetched variable length data to fixed length decoded data
INTEL CORP18 citations81
US5682208AOct 28, 1997
Motion estimation with efficient block matching
INTEL CORP11 citations74
US5517665AMay 14, 1996
System for controlling arbitration using the memory request signal types generated by the plurality of datapaths having dual-ported local memory architecture for simultaneous data transmission
INTEL CORP11 citations72
US4881194ANov 14, 1989
Stored-program controller for equalizing conditional branch delays
INTEL CORP16 citations72
TECHNOLOGY INC 64
4 patentsUS4791594ADec 13, 1988
Random-access psuedo random number generator
TECHNOLOGY INC 6466 citations96
US4823201AApr 18, 1989
Processor for expanding a compressed video signal
TECHNOLOGY INC 64118 citations95
US4816913AMar 28, 1989
Pixel interpolation circuitry as for a video signal processor
TECHNOLOGY INC 6454 citations92
US4783698ANov 8, 1988
Interpolator for compressed video data
TECHNOLOGY INC 6437 citations92