Inventor
KUO CHUNG-SHAN
TW15 patents
⚠️ This page may combine multiple inventors who share the name “KUO CHUNG-SHAN”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
ELITE SEMICONDUCTOR ESMT
6 patentsUS7443230B2Oct 28, 2008
Charge pump circuit
ELITE SEMICONDUCTOR ESMT22 citations92
US7542352B1Jun 2, 2009
Bit line precharge circuit
ELITE SEMICONDUCTOR ESMT18 citations83
US7924610B2Apr 12, 2011
Method for conducting over-erase correction
ELITE SEMICONDUCTOR ESMT7 citations78
US9298557B2Mar 29, 2016
Method of booting system having non-volatile memory device with erase checking and calibration mechanism and related memory device
ELITE SEMICONDUCTOR ESMT5 citations72
US7277329B2Oct 2, 2007
Erase method to reduce erase time and to prevent over-erase
ELITE SEMICONDUCTOR ESMT6 citations62
US9378822B2Jun 28, 2016
Method for programming selected memory cells in nonvolatile memory device and nonvolatile memory device thereof
ELITE SEMICONDUCTOR ESMT1 citations51
CONVERSANT INTELLECTUAL PROPERTY MAN INC
3 patentsUS10468109B2Nov 5, 2019
Method for erasing memory cells in a flash memory device using a positive well bias voltage and a negative word line voltage
CONVERSANT INTELLECTUAL PROPERTY MAN INC1 citations72
US10923194B2Feb 16, 2021
Method for erasing memory cells in a flash memory device using a positive well bias voltage and a negative word line voltage
CONVERSANT INTELLECTUAL PROPERTY MAN INC0 citations62
US9214233B2Dec 15, 2015
Method for erasing memory cells in a flash memory device using a positive well bias voltage and a negative word line voltage
CONVERSANT INTELLECTUAL PROPERTY MAN INC1 citations62