Inventor · disambiguated record
Mandana Tadayoni
Also filed as: TADAYONI MANDANA
10 granted patents·4 pending applications·68 citations·filing 2012–2016
87Inventor score
Top patents by PatentIndex Score
14 records- 0193US8711636B2Method of operating a split gate flash memory cell with coupling gateDO NHAN·Filed 2012·Granted Apr 29, 2014·27 cites·3 claims
- 0288US9431407B2Method of making embedded memory device with silicon-on-insulator substrateSILICON STORAGE TECH INC·Filed 2014·Granted Aug 30, 2016·10 cites·10 claims
- 0388US9245638B2Method of operating a split gate flash memory cell with coupling gateSILICON STORAGE TECH INC·Filed 2014·Granted Jan 26, 2016·11 cites·3 claims
- 0487US8785307B2Method of forming a memory cell by reducing diffusion of dopants under a gateLIU XIAN·Filed 2012·Granted Jul 22, 2014·9 cites·10 claims
- 0585US9634020B1Method of making embedded memory device with silicon-on-insulator substrateSILICON STORAGE TECH INC·Filed 2016·Granted Apr 25, 2017·4 cites·8 claims
- 0676US9306039B2Method of making split-gate memory cell with substrate stressor regionSILICON STORAGE TECH INC·Filed 2015·Granted Apr 5, 2016·2 cites·6 claims
- 0765US9793279B2Split gate non-volatile memory cell having a floating gate, word line, erase gate, and method of manufacturingSILICON STORAGE TECH INC·Filed 2016·Granted Oct 17, 2017·2 cites·5 claims
- 0862US9018690B2Split-gate memory cell with substrate stressor region, and method of making sameTADAYONI MANDANA·Filed 2012·Granted Apr 28, 2015·2 cites·5 claims
- 0955US9330922B2Self-aligned stack gate structure for use in a non-volatile memory array and a method of forming such structureTOREN WILLEM-JAN·Filed 2012·Granted May 3, 2016·1 cites·10 claims
- 1049US2014084367A1Extended Source-Drain MOS Transistors And Method Of FormationSILICON STORAGE TECH INC·Filed 2013·Application pending·0 cites
- 1144US2015270372A1Method Of Forming Extended Source-Drain MOS TransistorsSILICON STORAGE TECH INC·Filed 2015·Application pending·0 cites
- 1242US2015263040A1Embedded Memory Device With Silicon-On-Insulator Substrate, And Method Of Making SameSILICON STORAGE TECH INC·Filed 2014·Application pending·0 cites
- 1340US9570581B2Method of forming a self-aligned stack gate structure for use in a non-volatile memory arraySILICON STORAGE TECH INC·Filed 2016·Granted Feb 14, 2017·0 cites·9 claims
- 1438US2014273387A1Method Of Making High-Voltage MOS Transistors With Thin Poly GateSU CHIEN-SHENG·Filed 2013·Application pending·0 cites
Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →