Inventor
TRAN CANG N
US3 patents
Patents
3 patentsUS5893921AApr 13, 1999
Method for maintaining memory coherency in a computer system having a cache utilizing snoop address injection during a read transaction by a dual memory bus controller
IBM91 citations94
US5255374AOct 19, 1993
Bus interface logic for computer system having dual bus architecture
IBM74 citations94
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Protocol and system for performing line-fill address during copy-back operation
IBM15 citations70