Inventor
FRANASZEK PETER A
US59 patents
⚠️ This page may combine multiple inventors who share the name “FRANASZEK PETER A”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
IBM
42 patentsUS4486739ADec 4, 1984
Byte oriented DC balanced (0,4) 8B/10B partitioned block transmission code
IBM681 citations99
US6779088B1Aug 17, 2004
Virtual uncompressed cache size control in compressed memory systems
IBM154 citations97
US4952930AAug 28, 1990
Multipath hierarchical network
IBM69 citations96
US4488142ADec 11, 1984
Apparatus for encoding unconstrained data onto a (1,7) format with rate 2/3
IBM62 citations96
US6795897B2Sep 21, 2004
Selective memory controller access path for directory caching
IBM60 citations95
US6349372B1Feb 19, 2002
Virtual uncompressed cache for compressed main memory
IBM76 citations95
US5522032AMay 28, 1996
Raid level 5 with free blocks parity cache
IBM63 citations95
US6401181B1Jun 4, 2002
Dynamic allocation of physical memory space
IBM76 citations94
US5235592AAug 10, 1993
Dynamic switch protocols on a shared medium network
IBM57 citations94
US6993458B1Jan 31, 2006
Method and apparatus for preprocessing technique for forecasting in capacity management, software rejuvenation and dynamic resource allocation applications
IBM35 citations93
US6539460B2Mar 25, 2003
System and method for storing data sectors with header and trailer information in a disk cache supporting memory compression
IBM50 citations93
US5345228ASep 6, 1994
Very large scale modular switch
IBM21 citations93
US4984237AJan 8, 1991
Multistage network with distributed pipelined control
IBM29 citations93
US4929940AMay 29, 1990
Collision crossbar switch
IBM30 citations93
US4814762AMar 21, 1989
Delta network control of a cross-point switch
IBM33 citations93
US4752777AJun 21, 1988
Delta network of a cross-point switch
IBM45 citations93
US6842832B1Jan 11, 2005
Reclaim space reserve for a compressed memory system
IBM26 citations92
US6587923B1Jul 1, 2003
Dual line size cache directory
IBM23 citations92
US6353871B1Mar 5, 2002
Directory cache for indirectly addressed main memory
IBM34 citations92
US6341325B2Jan 22, 2002
Method and apparatus for addressing main memory contents including a directory structure in a computer system
IBM25 citations92
US6279092B1Aug 21, 2001
Kernel identification for space management in compressed memory systems
IBM28 citations92
US5495475AFeb 27, 1996
Resolution of race conditions in cascaded switches
IBM26 citations92
US5193188AMar 9, 1993
Centralized and distributed wait depth limited concurrency control methods and apparatus
IBM52 citations92
US4609907ASep 2, 1986
Dual channel partial response system
IBM27 citations92
US7716424B2May 11, 2010
Victim prefetching in a cache hierarchy
IBM33 citations91
US5635931AJun 3, 1997
System and method for compressing data information
IBM31 citations90
US5001730AMar 19, 1991
Clock synchronization algorithm for address independent networks
IBM33 citations89
US7039769B2May 2, 2006
Direct addressed shared compressed memory system
IBM18 citations84
US6665787B2Dec 16, 2003
Very high speed page operations in indirect accessed memory systems
IBM15 citations83
US7386679B2Jun 10, 2008
System, method and storage medium for memory management
IBM7 citations74
US6847315B2Jan 25, 2005
Nonuniform compression span
IBM10 citations74
USRE34528EFeb 1, 1994
Delta network of a cross-point switch
IBM11 citations74
US5264842ANov 23, 1993
Generalized usage of switch connections with wait chain
IBM11 citations74
US4763122AAug 9, 1988
Parallel switching with round robin priority
IBM14 citations74
US7979602B2Jul 12, 2011
Method and system for storing memory compressed data onto memory compressed disks
IBM5 citations73
US7958289B2Jun 7, 2011
Method and system for storing memory compressed data onto memory compressed disks
IBM6 citations73
US3971987AJul 27, 1976
Gain method and apparatus for a delta modulator
IBM12 citations72
US7493453B2Feb 17, 2009
System, method and storage medium for prefetching via memory block tags
IBM1 citations63
US7337278B2Feb 26, 2008
System, method and storage medium for prefetching via memory block tags
IBM4 citations63
US4525724AJun 25, 1985
Magnetic recording head array for longitudinal magnetic printing with staggered head arrangement and clustered wiring
IBM3 citations63
US7610541B2Oct 27, 2009
Computer compressed memory system and method for storing and retrieving data in a processing system
IBM4 citations62
US7523290B2Apr 21, 2009
Very high speed page operations in indirect accessed memory systems
IBM4 citations61
DALY DAVID M
2 patentsFRANASZEK PETER A
2 patentsBENVENISTE CAROLINE
2 patentsBROWN PAUL J
1 patentCASTELLI VITTORIO
1 patentShowing the top 50 of 59 patents by PatentIndex Score.