Inventor

TRENTZSCH MARTIN

DE26 patents

⚠️ This page may combine multiple inventors who share the name “TRENTZSCH MARTIN”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

TRENTZSCH MARTIN

GLOBALFOUNDRIES INC

Method of forming CMOS device having gate insulation layers of different type and thickness

FinFET method comprising high-K dielectric

Ferro-FET device with buried buffer/ferroelectric layer stack

Maintaining integrity of a high-K gate stack by an offset spacer used to determine an offset of a strain-inducing semiconductor alloy

Work function adjustment in high-k gate stacks including gate dielectrics of different thickness

Metal gate structure for semiconductor devices

Semiconductor device with field-inducing structure

Semiconductor resistor including a dielectric layer including a species creating fixed charges and method for the formation thereof

NVM device in SOI technology and method of fabricating an according device

Methods for fabricating integrated circuits with isolation regions having uniform step heights

KRONHOLZ STEPHAN

Enhancing interface characteristics between a channel semiconductor alloy and a gate dielectric by an oxidation process

Enhancing uniformity of a channel semiconductor alloy by forming STI structures after the growth process

Enhancing interface characteristics between a channel semiconductor alloy and a gate dielectric by an oxidation process

Adjusting of a non-silicon fraction in a semiconductor alloy during transistor fabrication by an intermediate oxidation process

CARTER RICHARD

Adjusting threshold voltage for sophisticated transistors by diffusing a gate dielectric cap layer material prior to gate dielectric stabilization

Uniform high-k metal gate stacks by adjusting threshold voltage for sophisticated transistors by diffusing a metal species prior to gate patterning

Adjusting threshold voltage for sophisticated transistors by diffusing a gate dielectric cap layer material prior to gate dielectric stabilization

ADVANCED MICRO DEVICES INC

Technique for locally adapting transistor characteristics by using advanced laser/flash anneal techniques

Gate dielectrics of different thickness in PMOS and NMOS transistors

TRENTZSCH MARTIN

Reducing the creation of charge traps at gate dielectrics in MOS transistors by performing a hydrogen treatment

In situ monitoring of metal contamination during microstructure processing

BEYER SVEN

Semiconductor device comprising a metal gate stack of reduced height and method of forming the same

GERHARDT MARTIN

Method of enhancing lithography capabilities during gate formation in semiconductors having a pronounced surface topography

ERBEN ELKE

Passivating point defects in high-K gate dielectric layers during gate stack formation

GRASS CARSTEN

Method of forming a material layer in a semiconductor structure

KELWING TORBEN

CET and gate current leakage reduction in high-k metal gate electrode structures by heat treatment after diffusion layer removal