Inventor
CHUNG CHIA-CHI
TW18 patents
⚠️ This page may combine multiple inventors who share the name “CHUNG CHIA-CHI”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
TAIWAN SEMICONDUCTOR MFG CO LTD
7 patentsUS10295909B2May 21, 2019
Edge-exposure tool with an ultraviolet (UV) light emitting diode (LED)
TAIWAN SEMICONDUCTOR MFG CO LTD5 citations80
US10155305B2Dec 18, 2018
Multi-function multi-angle cleaning tool
TAIWAN SEMICONDUCTOR MFG CO LTD3 citations66
US10964653B2Mar 30, 2021
Method of forming a semiconductor device comprising top conductive pads
TAIWAN SEMICONDUCTOR MFG CO LTD3 citations65
US10739682B2Aug 11, 2020
Edge-exposure tool with an ultraviolet (UV) light emitting diode (LED)
TAIWAN SEMICONDUCTOR MFG CO LTD0 citations48
US10509323B2Dec 17, 2019
Edge-exposure tool with an ultraviolet (UV) light emitting diode (LED)
TAIWAN SEMICONDUCTOR MFG CO LTD0 citations48
US10131539B2Nov 20, 2018
Method for forming micro-electro-mechanical system (MEMS) device structure
TAIWAN SEMICONDUCTOR MFG CO LTD0 citations48
US12564091B2Feb 24, 2026
Silicon fragment defect reduction in grinding process
TAIWAN SEMICONDUCTOR MFG CO LTD0 citations45
MACRONIX INT CO LTD
6 patentsUS7026682B2Apr 11, 2006
Non-volatile memory device with enlarged trapping layer
MACRONIX INT CO LTD32 citations92
US6774051B2Aug 10, 2004
Method for reducing pitch
MACRONIX INT CO LTD36 citations91
US6791190B1Sep 14, 2004
Self-aligned contact/borderless contact opening and method for forming same
MACRONIX INT CO LTD9 citations73
US6713332B2Mar 30, 2004
Non-volatile memory device with enlarged trapping layer
MACRONIX INT CO LTD6 citations73
US6790772B2Sep 14, 2004
Dual damascene processing method using silicon rich oxide layer thereof and its structure
MACRONIX INT CO LTD11 citations72
US6670275B2Dec 30, 2003
Method of rounding a topcorner of trench
MACRONIX INT CO LTD10 citations70