Inventor

SHORE MICHAEL A

US52 patents

⚠️ This page may combine multiple inventors who share the name “SHORE MICHAEL A”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

SHORE MICHAEL A

MICRON TECHNOLOGY INC

Apparatuses and methods for managing row access counts

Refresh controller and address remapping circuit and method for dual mode full/reduced density DRAMs

Device and method for repairing a memory array by storing each bit in multiple memory cells in the array

Refresh controller and address remapping circuit and method for dual mode full/reduced density DRAMs

Device and method for repairing a memory array by storing each bit in multiple memory cells in the array

Device and method for repairing a memory array by storing each bit in multiple memory cells in the array

Device and method for repairing a memory array by storing each bit in multiple memory cells in the array

Device and method for repairing a memory array by storing each bit in multiple memory cells in the array

Device and method for repairing a memory array by storing each bit in multiple memory cells in the array

DRAMs having on-chip row copy circuits for use in testing and video imaging and method for operating same

Apparatuses and methods for managing row access counts

Apparatus with an internal-operation management mechanism

Apparatuses and methods for controlling steal rates

Device and method for repairing a memory array by storing each bit in multiple memory cells in the array

Refresh controller and address remapping circuit and method for dual mode full/reduced density DRAMs

Apparatus and method for increasing test flexibility of a memory device

Method and apparatus for multiple row activation in memory devices

Apparatus and method for increasing test flexibility of a memory device

Method and apparatus for multiple row activation in memory devices

Device and method for using dynamic cell plate sensing in a DRAM memory cell

Apparatuses and methods for controlling steal rates

Apparatuses and methods for memory including ferroelectric memory cells and dielectric memory cells

Method for testing a memory device having different number of data pads than the tester

memories and methods for repair in open digit memory architectures

Device having a memory array storing each bit in multiple memory cells

Device and method for repairing a memory array by storing each bit in multiple memory cells in the array

Method and apparatus for multiple row activation in memory devices

Device and method for repairing a memory array by storing each bit in multiple memory cells in the array

Refresh controller and address remapping circuit and method for dual mode full/reduced density DRAMs

Device and method having a memory array storing each bit in multiple memory cells

Refresh controller and address remapping circuit and method for dual mode full/reduced density DRAMS

Device and method for repairing a memory array by storing each bit in multiple memory cells in the array

Method and apparatus for multiple row activation in memory devices

Refresh controller and address remapping circuit and method for dual mode full/reduced density DRAMs

Apparatuses and methods for memory including ferroelectric memory cells and dielectric memory cells

Memory with internal refresh rate control

Device and method for using dynamic cell plate sensing in a DRAM memory cell

Systems, memories, and methods for repair in open digit memory architectures

Apparatuses, systems, and methods for controller directed targeted refresh operations based on sampling command

Memory with internal refresh rate control

Memory devices, testing systems and methods

Memory devices, testing systems and methods

Device and method for using dynamic cell plate sensing in a DRAM memory cell

Device and method for repairing a memory array by storing each bit in multiple memory cells in the array

Systems and methods for memory cell array initialization

Systems and methods for memory cell array initialization

Apparatuses and methods for refresh address masking

SHORE MICHAEL A

Device and method having a memory array storing each bit in multiple memory cells

Memory devices, testing systems and methods

MICRON SEMICONDUCTOR INC

Hardware implemented row copy enable mode for DRAMS to create repetitive backgrounds for video images or DRAM testing