Inventor

TSAI CHING-WEI

TW283 patents

⚠️ This page may combine multiple inventors who share the name “TSAI CHING-WEI”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

TSAI CHING-WEI

TAIWAN SEMICONDUCTOR MFG CO LTD

Multi-gate device and method of fabrication thereof

Method of forming semiconductor structure with horizontal gate all around structure

Multi-gate device and method of fabrication thereof

FINFETs with wrap-around silicide and method forming the same

Multi-gate device and related methods

Methods of manufacturing inner spacers in a gate-all-around (GAA) FET through multi-layer spacer replacement

Semiconductor device on hybrid substrate and method of manufacturing the same

FinFET with source/drain structure

Semiconductor structure with multi spacer

Devices including gate spacer with gap or void and methods of forming the same

Devices including gate spacer with gap or void and methods of forming the same

Devices including gate spacer with gap or void and methods of forming the same

Devices including gate spacer with gap or void and methods of forming the same

FinFET channel on oxide structures and related methods

FETs and methods of forming FETs

Backside interconnect structures for semiconductor devices and methods of forming the same

Tuning threshold voltage in nanosheet transitor devices

Integrated circuit structure with backside via rail

Self-aligned etch in semiconductor devices

Nano-sheet-based devices with asymmetric source and drain configurations

Backside PN junction diode

Method of forming high performance MOSFETs having varying channel structures

Transistors with varying width nanosheet

Semiconductor device and method

Structure and method for gate-all-around device with extended channel

Semiconductor device and method of fabrication thereof

Multi-gate device and related methods

Methods of manufacturing gate-all-around (GAA) FETs through partial replacement of gate spacers

Metal rail conductors for non-planar semiconductor devices

Integrated circuit structure and method with hybrid orientation for FinFET

Semiconductor device and manufacturing method thereof

Transistor channel

FINFETs with wrap-around silicide and method forming the same

Hybrid scheme for improved performance for P-type and N-type FinFETs

FinFET semiconductor structure having hybrid substrate and method of fabricating the same

Method for manufacturing semiconductor structure with multi spacers

Input/output (I/O) devices with greater source/drain proximity than non-I/O devices

Transistor channel

Integrated circuit structure with substrate isolation and un-doped channel

Semiconductor arrangement with substrate isolation

Semiconductor structure with recessed source/drain structure and method for forming the same

Multi-gate device and method of fabrication thereof

FinFET devices having different source/drain proximities for input/output devices and non-input/output devices and the method of fabrication thereof

Method of forming FinFET channel

FETS and methods of forming FETS

Vertical device architecture

TAIWAN SEMICONDUCTOR MFG

High performance CMOS device design

Semiconductor device and method for high-k gate dielectrics

Method and apparatus for a semiconductor device with a high-k gate dielectric

Method and apparatus for a semiconductor device with a high-k gate dielectric