Inventor
VENKATASUBRAMANIAN GIRISH
US11 patents
⚠️ This page may combine multiple inventors who share the name “VENKATASUBRAMANIAN GIRISH”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
INTEL CORP
10 patentsUS9274799B1Mar 1, 2016
Instruction and logic for scheduling instructions
INTEL CORP11 citations81
US9858057B2Jan 2, 2018
Methods and apparatus to validate translated guest code in a dynamic binary translator
INTEL CORP2 citations71
US9223553B2Dec 29, 2015
Methods and apparatus to validate translated guest code in a dynamic binary translator
INTEL CORP5 citations71
US11372775B2Jun 28, 2022
Management of the untranslated to translated code steering logic in a dynamic binary translation based processor
INTEL CORP1 citations57
US10474442B2Nov 12, 2019
Methods and apparatus to perform region formation for a dynamic binary translation processor
INTEL CORP1 citations50
US9823938B2Nov 21, 2017
Providing deterministic, reproducible, and random sampling in a processor
INTEL CORP1 citations50
US10055256B2Aug 21, 2018
Instruction and logic for scheduling instructions
INTEL CORP1 citations49
US10191745B2Jan 29, 2019
Optimized call-return and binary translation
INTEL CORP0 citations45
US10083033B2Sep 25, 2018
Apparatus and method for efficient register allocation and reclamation
INTEL CORP0 citations39
US9916164B2Mar 13, 2018
Methods and apparatus to optimize instructions for execution by a processor
INTEL CORP0 citations39