Inventor

TEKUMALLA RAMESH C

US24 patents

⚠️ This page may combine multiple inventors who share the name “TEKUMALLA RAMESH C”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

TEKUMALLA RAMESH C

TEKUMALLA RAMESH C

Scan chain lockup latch with data input control responsive to scan enable signal

Integrated circuit comprising scan test circuitry with controllable number of capture pulses

Integrated circuit having clock gating circuitry responsive to scan shift control signal

Scan test circuitry configured to prevent capture of potentially non-deterministic values

Scan test circuitry with delay defect bypass functionality

Scan test circuitry configured for bypassing selected segments of a multi-segment scan chain

Scan enable timing control for testing of scan cells

Dynamic clock domain bypass for scan chains

Low-power and area-efficient scan cell for integrated circuit testing

Efficient wrapper cell design for scan testing of integrated

Scan test circuitry with selectable transition launch mode

Integrated circuit comprising scan test circuitry with parallel reordered scan chains

Integrated circuit with transition control circuitry for limiting scan test signal transitions during scan testing

Scan test circuitry comprising scan cells with multiple scan inputs

LSI CORP

At-speed scan testing of interface functional logic of an embedded memory or other circuit core

Scan circuitry for testing input and output functional paths of an integrated circuit

Scan test circuitry configured to prevent violation of multiplexer select signal constraints during scan testing

Clock control for reducing timing exceptions in scan testing of an integrated circuit

At-speed scan testing of clock divider logic in a clock module of an integrated circuit

Integrated clock architecture for improved testing

SUN MICROSYSTEMS INC

Reducing verification time for integrated circuit design including scan circuits

Algorithms for determining path coverages and activity

KRISHNAMOORTHY PRAKASH

Coding circuitry for difference-based data transformation

Instruction address encoding and decoding based on program construct groups