Inventor

TSAI JUI-CHE

TW48 patents

⚠️ This page may combine multiple inventors who share the name “TSAI JUI-CHE”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

TSAI JUI-CHE

TAIWAN SEMICONDUCTOR MFG CO LTD

Method and device to speed-up leakage based PUF generators under extreme operation conditions

Physically unclonable function (PUF) generation

SRAM power-up random number generator

Sense amplifier for coupling effect reduction

SRAM power-up random number generator

Sense amplifier for coupling effect reduction

Memory circuit and method of operating same

Balanced negative bitline voltage for a write assist circuit

I/O circuit design for SRAM-based PUF generators

SRAM device capable of working in multiple low voltages without loss of performance

Memory devices, semiconductor devices, and methods of operating a memory device

I/O circuit design for SRAM-based PUF generators

Memory device with additional write bit lines

Nonvolatile SRAM

Balanced negative bitline voltage for a write assist circuit

I/O circuit design for SRAM-based PUF generators

Nonvolatile SRAM

Memory device with additional write bit lines

Method of minimizing read-disturb-write effect of SRAM circuit and SRAM circuit thereof

Memory circuit and method of operating same

Balanced coupling structure for physically unclonable function (PUF) application

Non-volatile static random access memory (NVSRAM) with multiple magnetic tunnel junction cells

Memory devices, semiconductor devices, and methods of operations a memory device

SRAM power-up random number generator

Sense amplifier for coupling effect reduction

Physically unclonable function (PUF) generation

Non-volatile static random access memory (nvSRAM) with multiple magnetic tunnel junction cells

Non-volatile static random access memory (nvSRAM) with multiple magnetic tunnel junction cells

Memory macro and method of operating the same

Non-volatile static random access memory (nvSRAM) with multiple magnetic tunnel junction cells

Integrated circuit and operating method thereof

Memory macro which changes operational modes

Method and device to speed-up leakage based PUF generators under extreme operation conditions

Memory macro disableable input-output circuits and methods of operating the same

SRAM device capable of working in multiple low voltages without loss of performance

Device having multiple-layer pins in memory MUX1 layout

Memory circuit and method for routing the memory circuit

TAIWAN SEMICONDUCTOR MFG

Three-dimensional two port register file

Simultaneous two/dual port access on 6T SRAM

Method of writing to and reading data from a three-dimensional two port register file

Device having multiple-layer pins in memory MUX1 layout

UNIV CALIFORNIA

Wavelength-selective 1×N2 switches with two-dimensional input/output fiber arrays

Wavelength-selective 1×N2 switches with two-dimensional input/output fiber arrays

CALIFORNIA INST OF TECHN

Apparatus and method for sensing electromagnetic radiation using a tunable device

LEE CHENG HUNG

Memory circuits, systems, and methods for routing the memory circuits

WU CHING-WEI

Access to multi-port devices

VOLVO CAR CORP

Pedestrian detection via a boundary cylinder model

HON HAI PREC IND CO LTD

Test equipment and test system using the same