Inventor
LIM HYEOKJIN
US14 patents
Patents
14 patentsUS9831272B2Nov 28, 2017
Metal oxide semiconductor cell device architecture with mixed diffusion break isolation trenches
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US11710733B2Jul 25, 2023
Vertical power grid standard cell architecture
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US11404374B2Aug 2, 2022
Circuits employing a back side-front side connection structure for coupling back side routing to front side routing, and related complementary metal oxide semiconductor (CMOS) circuits and methods
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US10777640B2Sep 15, 2020
Standard cell architecture for gate tie-off
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US10600866B2Mar 24, 2020
Standard cell architecture for gate tie-off
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US10236886B2Mar 19, 2019
Multiple via structure for high performance standard cells
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US10605859B2Mar 31, 2020
Visible alignment markers/landmarks for CAD-to-silicon backside image alignment
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US11133803B2Sep 28, 2021
Multiple via structure for high performance standard cells
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US10965289B2Mar 30, 2021
Metal oxide semiconductor device of an integrated circuit
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US10490543B2Nov 26, 2019
Placement methodology to remove filler
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US11437379B2Sep 6, 2022
Field-effect transistors (FET) circuits employing topside and backside contacts for topside and backside routing of FET power and logic signals, and related complementary metal oxide semiconductor (CMOS) circuits
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US10784345B2Sep 22, 2020
Standard cell architecture for gate tie-off
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US11290109B1Mar 29, 2022
Multibit multi-height cell to improve pin accessibility
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US10692808B2Jun 23, 2020
High performance cell design in a technology with high density metal routing
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